Nonvolatile memory interface protocol which selects a memory device, transmits an address, deselects the device, subsequently reselects the device and accesses data

• US 5,920,884 A
• Filed: 06/12/1997
• Issued: 07/06/1999
• Est. Priority Date: 09/24/1996
• Status: Expired due to Fees

• Current Assignee: Magnachip Semiconductor Limited (Magnachip Semiconductor)
• Original Assignee: Hyundai Electronics America Incorporated (SK Hynix Inc.)
• Inventors: Lee, Jong Seuk, Jennings, Earle Willis III
• Primary Examiner(s): Robertson, David L.
• Application Number:
  US08/873,979
• Time in Patent Office: 754 Days
• Field of Search: 365/230.08, 711/1, 711/102, 711/103, 711/154, 711/167, 711/169
• US Class Current: 711/102
• CPC Class Codes: G06F 13/4239 with asynchronous protocol
• CPC Class Codes: Y02D 10/00 Energy efficient computing, e.g. low power processors, power management or thermal management

Abstract

A non-volatile memory access protocol that facilitates concurrent accessing operations to multiple non-volatile memory components. This approach provides significant speed advantages over prior art non-volatile protocols. Also, power consumption is reduced in comparison to prior art synchronous protocols used for volatile memory because each memory component need not be continuously selected.

Claims

1. A method of operating a plurality of non-volatile memory devices comprising the steps of:

selecting a first non-volatile memory device to initiate a selected state of said first non-volatile memory device;

during said selected state, transmitting information identifying a location to be accessed at said first non-volatile memory device;

thereafter

causing said location identifying information to be stored in a location register of said first non-volatile memory device;

after transmitting said location identifying information, terminating said selected state of said first non-volatile memory device;

reselecting said first non-volatile memory device to again initiate said selected state of said first non-volatile memory device; and

thereafter

accessing a data word from said first non-volatile memory device, said data word being stored at a location determined by said location identifying information.

2. The method of claim 1 wherein said selecting, transmitting, and terminating steps are repeated for a second non-volatile memory device prior to reselecting said first non-volatile memory device.

3. The method of claim 1 wherein said non-volatile memory devices share a common data bus.

4. The method of claim 3 wherein said transmitting step comprises transmitting said sector identifying information via said data bus.

5. The method of claim 3 wherein said accessing step comprises reading said data word from said first non-volatile memory device via said data bus.

6. The method of claim 5 wherein accessing step comprises writing said data word to said first non-volatile memory device via said data bus.

7. The method of claim 1 further comprising the step of after said accessing step, again terminating said selected state of said non-volatile memory device.

8. The method of claim 7 wherein only a single data word is accessed at said non-volatile memory device after said reselecting step and prior to said step of again terminating said selected state.

9. The method of claim 1 wherein said selecting step comprises selecting only said first non-volatile memory device among said plurality of non-volatile memory devices.

10. The method of claim 8 wherein said selecting step comprises presenting said first non-volatile memory device with a pattern of input states representing a select address of said first non-volatile memory device.

11. The method of claim 5 wherein between said terminating step and said reselecting step said first non-volatile memory device internally retrieves said first selected word into an output register and maintains contents of said output register until said reselecting step.

12. The method of claim 7 wherein said location identifying information identifies a multi-word sector and wherein said reselecting and accessing steps are repeated for successive locations of said sector.

13. The method of claim 12 wherein one or more other non-volatile memory devices of said plurality are accessed while said first non-volatile memory device is not in a selected state.

14. The method of claim 1 further comprising the steps of:

selecting a second non-volatile memory device to initiate a selected state of said second non-volatile memory device;

transmitting an erasure command to said second non-volatile memory device designating a memory location to be erased; and

erasing said designated memory location.

15. The method of claim 13 wherein said transmitting step comprises transmitting an erasure command designating a plurality of memory locations to be erased and wherein said erasing step comprises erasing said plurality of designated memory locations.

16. A method of operating a plurality of non-volatile memory devices comprising the steps of:

selecting a first non-volatile memory device to initiate a selected state of said first non-volatile memory device;

during said selected state, transmitting information identifying a location to be accessed at said first non-volatile memory device;

thereafter

after transmitting said location identifying information, terminating said selected state of said first non-volatile memory device;

reselecting said first non-volatile memory device to again initiate said selected state of said first non-volatile memory device; and

thereafter

accessing a data word from said first non-volatile memory device, said data word being stored at a location determined by said location identifying information.

17. A non-volatile memory system comprising:

a plurality of non-volatile memory devices, each non-volatile memory device being driven into a selected state by a particular pattern of selection line input states;

a memory interface system that performs the steps of;

activating selection line input states of a first non-volatile memory device to initiate a selected state of said first non-volatile memory device;

during said selected state, transmitting information identifying a location to be accessed at said first non-volatile memory device;

thereafter

terminating said selected state of said first non-volatile memory device after transmitting said location identifying information;

reselecting said first non-volatile memory device to again initiate said selected state of said first non-volatile memory device; and

thereafter

accessing a data word from said first non-volatile memory device, said data word being stored at a location determined by said location identifying information.

18. The non-volatile memory system of claim 17 wherein said memory interface system repeats said selecting, transmitting, and terminating steps for a second non-volatile memory device prior to reselecting said first non-volatile memory device.

19. The non-volatile memory system of claim 17 further comprising a common data bus shared by said plurality of non-volatile memory devices.

20. The non-volatile memory system of claim 19 wherein said memory interface system transmits said sector identifying information via said data bus.

21. The non-volatile memory system of claim 20 wherein said accessing step comprises reading said data word from said first non-volatile memory device via said data bus.

22. The non-volatile memory system of claim 21 wherein accessing step comprises writing said data word to said first non-volatile memory device via said data bus.

23. The non-volatile memory system of claim 17 wherein said memory interface system further performs a step of after said accessing step, again terminating said selected state of said non-volatile memory device.

24. The non-volatile memory system of claim 23 wherein only a single data word is accessed at said non-volatile memory device after said reselecting step and prior to said step of again terminating said selected state.

25. The non-volatile memory system of claim 17 wherein said selecting step comprises selecting only said first non-volatile memory device among said plurality of non-volatile memory devices.

26. The non-volatile memory system of claim 24 wherein said selecting step comprises presenting said first non-volatile memory device with a pattern of input states representing a select address of said first non-volatile memory device.

27. The non-volatile memory system of claim 21 wherein between said terminating step and said reselecting step said first non-volatile memory device internally retrieves said first selected word into an output register and maintains contents of said output register until said reselecting step.

28. The non-volatile memory system of claim 23 wherein said location identifying information identifies a multi-word sector and wherein said reselecting and accessing steps are repeated for successive locations of said sector.

29. The non-volatile memory system of claim 28 wherein one or more other non-volatile memory devices of said plurality are accessed while said first non-volatile memory device is not in a selected state.

30. The non-volatile memory system of claim 17 wherein said memory interface further performs the steps of:

selecting a second non-volatile memory device to initiate a selected state of said second non-volatile memory device;

transmitting an erasure command to said second non-volatile memory device designating a memory location to be erased; and

erasing said designated memory location.

31. The non-volatile memory system of claim 30 wherein said transmitting step comprises transmitting an erasure command designating a plurality of memory locations to be erased and wherein said erasing step comprises erasing said plurality of designated memory locations.

32. The non-volatile memory system of claim 17 further comprising:

a translator within said memory interface system that receives disk-drive protocol commands and controls said selecting and transmitting steps to fulfill said disk-drive protocol commands.

33. The non-volatile memory system of claim 17 wherein said disk-drive protocol commands are ATA commands.

34. A plurality of non-volatile memory systems as recited in claim 17 in combination with a RAID host interface that is coupled to said non-volatile memory systems via a plurality of parallel data buses.

35. A computer system comprising:

a central processing unit;

a host bus coupled to said central processing unit; and

a non-volatile memory system coupled to said host bus for storing information accessible by said central processing unit;

said non-volatile memory system comprising;

a plurality of non-volatile memory devices, each non-volatile memory device being driven into a selected state by a particular pattern of selection line input states;

a memory interface system that performs the steps of;

activating selection line input states of a first non-volatile memory device to initiate a selected state of said first non-volatile memory device;

during said selected state, transmitting information identifying a location to be accessed at said first non-volatile memory device;

thereafter

terminating said selected state of said first non-volatile memory device after transmitting said location identifying information;

reselecting said first non-volatile memory device to again initiate said selected state of said first non-volatile memory device; and

thereafter

accessing a data word from said first non-volatile memory device, said data word being stored at a location determined by said location identifying information;

a translator within said memory interface system that receives disk-drive protocol commands from said host bus and controls said selecting and transmitting steps to fulfill said disk-drive protocol commands.

36. A non-volatile memory interface comprising:

a selection circuit that selects a first non-volatile memory device to initiate a selected state of said first non-volatile memory device;

a location transmitting circuit that, during said selected state, transmitting information identifying a location to be accessed at said first non-volatile memory device;

a selected state terminating circuit that, after transmission of said location identifying information, terminates said selected state of said first non-volatile memory device;

a reselection circuit that reselects said first non-volatile memory device to again initiate said selected state of said first non-volatile memory device; and

an access circuit that accesses a data word from said first non-volatile memory device, said data word being stored at a location determined by said location identifying information.