Single-chip system having electrostatic discharge (ESD) protective circuitry including a single bipolar transistor portion

• US 5,923,079 A
• Filed: 11/28/1997
• Issued: 07/13/1999
• Est. Priority Date: 11/29/1996
• Status: Expired due to Term

• Current Assignee: Longitude Semiconductor S.à r.l. (Vector Capital Corporation)
• Original Assignee: NEC Corporation
• Inventors: Narita, Kaoru
• Primary Examiner(s): Hardy, David B.
• Application Number:
  US08/969,341
• Time in Patent Office: 592 Days
• Field of Search: 257/355-363, 257/577
• US Class Current: 257/577
• CPC Class Codes: H01L 27/0248 for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection

Abstract

To protect a system efficiently from static electricity and electrostatic discharge (ESD) and thereby prevent the system from becoming defective, a system formed on a first conductivity-type semiconductor substrate includes a pad for receiving a signal, a protection element connected to the pad, and a discharge line connected to the protection element. The protection element includes a single bipolar transistor portion and at least one diode portion located adjacent to the bipolar transistor portion.

Claims

1. A single-chip system formed on a substrate, comprising:

a pad for receiving a signal;

a protection element connected to said pad; and

a discharge line connected to said protection element,

wherein said protection element comprises a single bipolar transistor portion and at least one diode portion located adjacent to said bipolar transistor portion,

wherein said substrate comprises a first conductivity-type semiconductor substrate, and wherein said bipolar transistor portion comprises;

a plurality of first diffusion regions having a second conductivity-type, formed in said substrate and connected to said pad; and

a plurality of second diffusion regions having said second conductivity-type, formed in said substrate and connected to said discharge line;

wherein said each of said first diffusion regions is located adjacent to said second diffusion regions, and ends of said first and second diffusion regions are formed with angles other than substantially ninety degrees.

2. A single-chip system formed on a substrate, comprising:

a pad for receiving a signal;

a protection element connected to said pad; and

a discharge line connected to said protection element,

wherein said protection element comprises a single bipolar transistor portion and at least one diode portion located adjacent to said bipolar transistor portion,

wherein said substrate comprises a first conductivity-type semiconductor substrate,

and wherein said bipolar transistor portion comprises;

a plurality of first diffusion regions having a second conductivity-type, formed in said substrate and connected to said pad; and

a plurality of second diffusion regions having said second conductivity-type, formed in said substrate and connected to said discharge line,

wherein said each of said first diffusion regions is located adjacent to said second diffusion regions,

wherein each of said first diffusion regions and said second diffusion regions has a substantially rectangular shape, and said first diffusion regions and said second diffusion regions are located parallel to each other, and

wherein a corner of said substantially rectangular shape of said first and second diffusion regions has an obtuse angle.

3. The system as recited in claim 2, further comprising a first contact hole for connecting said first diffusion region to said pad electrically, and a second contact hole and a third contact hole for connecting said second diffusion region to said discharge line.

4. The system as recited in claim 3, wherein a distance from said first contact hole to said second contact hole and a distance from said first contact hole to said third contact hole are substantially equal.

5. The system as recited in claim 3, wherein said second contact hole is offset from said first and third contact holes.

6. The system as recited in claim 4, wherein said substrate comprises a plurality of third diffusion regions having said second conductivity-type and having a depth deeper than that of said first and second diffusion regions, under said first, second and third contact holes.

7. The system as recited in claim 6, wherein said first conductivity-type comprises a P-type and said second conductivity-type comprises an N-type.

8. The system as recited in claim 7, further comprising an internal circuit connected to said pad, wherein said internal circuit comprises a plurality of dynamic random access memory (DRAM) cells, and wherein said protection element comprises an electrostatic discharge protector.

9. An electrostatic discharge (ESD) protective circuit, formed on a substrate, for protecting a semiconductor device, comprising:

a single bipolar transistor portion; and

at least one diode portion located adjacent to said bipolar transistor portion,

wherein said semiconductor device includes a pad and a discharge line connected to said protective circuit, and said substrate comprises a first conductivity-type semiconductor substrate, and wherein said bipolar transistor portion comprises;

a plurality of first diffusion regions having a second conductivity-type, formed in said substrate and connected to said pad; and

a plurality of second diffusion regions having said second conductivity-type, formed in said substrate and connected to said discharge line,

wherein said each of said first diffusion regions is located adjacent to said second diffusion regions, and ends of said first and second diffusion regions are formed with angles other than substantially ninety degrees.

10. An electrostatic discharge (ESD) protective circuit, formed on a substrate, for protecting a semiconductor device, comprising:

a single bipolar transistor portion; and

at least one diode portion located adjacent to said bipolar transistor portion,

wherein said semiconductor device includes a pad and a discharge line connected to said protective circuit, and said substrate comprises a first conductivity-type semiconductor substrate, and wherein said bipolar transistor portion comprises;

a plurality of first diffusion regions having a second conductivity-type, formed in said substrate and connected to said pad; and

a plurality of second diffusion regions having said second conductivity-type, formed in said substrate and connected to said discharge line,

wherein said each of said first diffusion regions is located adjacent to said second diffusion regions, and each of said first diffusion regions and said second diffusion regions has a substantially rectangular shape, said first diffusion regions and said second diffusion regions being located parallel to each other, and

wherein a corner of said substantially rectangular shape has an obtuse angle.

11. The circuit as recited in claim 10, further comprising a first contact hole for connecting said first diffusion region to said pad electrically, and a second contact hole and a third contact hole for connecting said second diffusion region to said discharge line.

12. The circuit as recited in claim 11, wherein a distance from said first contact hole to said second contact hole and a distance from said first contact hole to said third contact hole are substantially the same.

13. The circuit as recited in claim 12, wherein said substrate comprises a plurality of third diffusion regions having said second conductivity-type and having a depth deeper than that of said first and second diffusion regions, under said first, second and third contact holes.

14. The circuit as recited in claim 13, wherein said first conductivity-type comprises a P-type and said second conductivity-type comprises an N-type.

15. A semiconductor device having an electrostatic discharge protective circuit coupled between a pad and a discharge line, comprising:

a diode portion including a first diffusion region which is connected to said discharge line and has a first conductivity-type, and a second diffusion region which is connected to said pad and has a second conductivity-type, said first diffusion region being adjacent to said second diffusion region; and

a bipolar transistor portion including a third diffusion region which is connected to said discharge line and has said second conductivity-type, a fourth diffusion region which is connected to said pad and has said second conductivity type, and a fifth diffusion region which is connected to said discharge line and has said second conductivity-type,

wherein said first, second, third, fourth and fifth diffusion regions are formed in that order in a semiconductor layer of said first conductivity-type.

16. A semiconductor device having an electrostatic discharge protective circuit coupled between a pad and a discharge line, comprising:

a diode portion including a first diffusion region which is connected to said discharge line and has a first conductivity-type, and a second diffusion region which is connected to said pad and has a second conductivity-type, said first diffusion region being adjacent to said second diffusion region; and

a bipolar transistor portion including a third diffusion region which is connected to said discharge line and has said second conductivity-type, a fourth diffusion region which is connected to said pad and has said second conductivity type, and a fifth diffusion region which is connected to said discharge line and has said second conductivity-type,

wherein said second, first, third, fourth and fifth diffusion regions are formed in that order in a semiconductor layer of said first conductivity-type.

17. A semiconductor device having an electrostatic discharge protective circuit coupled between a pad and a discharge line, comprising:

a diode portion including a first diffusion region which is connected to said discharge line and has a first conductivity-type, and a second diffusion region which is connected to said pad and has a second conductivity-type, said first diffusion region being adjacent to said second diffusion region; and

a bipolar transistor portion including a third diffusion region which is connected to said discharge line and has said second conductivity-type, a fourth diffusion region which is connected to said pad and has said second conductivity type, and a fifth diffusion region which is connected to said discharge line and has said second conductivity-type,

wherein said diode portion further includes a sixth diffusion region which is connected to said discharge line and has said first conductivity-type,

said sixth, second, first, third, fourth and fifth diffusion regions being formed in that order in a semiconductor layer of said first conductivity-type.