Logarithmic taper resistor with zero crossing changes
First Claim
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1. A semi-conductor potentiometer which comprises:
- a resistor array comprised of a plurality of cells of resistors each having a resistive value wherein the arrangement of resistors and resistive value of the resistors varies from cell to cell;
a plurality of gate devices for selecting a wiper point wherein there exists a wiper point for every cell and there exists a gate device for every wiper point adapted for selecting said wiper point;
a multiplex control device which comprises a zero-crossing detector adapted for triggering potentiometer changes at or near a zero-crossing of a signal being amplified; and
an interface device connected to the multiplexer control device adapted for interfacing said multiplex control device directly to an external switch without requiring a special circuit or CPU to provide an interface.
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Abstract
A digital potentiometer capable of being connected directly to an electronic switch is disclosed. The digital potentiometer for example may utilize a 64 step resistor array, which would then have 64 steps. Each of the steps have precise values so as to accurately attenuate a signal in logarithmic steps. The logarithmic resistor is connected to a gate device which in turn has a voltage source connected to it designed to provide the threshold or turn-on voltage for the device for each of the 64 steps and wiper points of the resistor array.
44 Citations
10 Claims
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1. A semi-conductor potentiometer which comprises:
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a resistor array comprised of a plurality of cells of resistors each having a resistive value wherein the arrangement of resistors and resistive value of the resistors varies from cell to cell; a plurality of gate devices for selecting a wiper point wherein there exists a wiper point for every cell and there exists a gate device for every wiper point adapted for selecting said wiper point; a multiplex control device which comprises a zero-crossing detector adapted for triggering potentiometer changes at or near a zero-crossing of a signal being amplified; and an interface device connected to the multiplexer control device adapted for interfacing said multiplex control device directly to an external switch without requiring a special circuit or CPU to provide an interface.
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2. In an amplifier for amplifying a signal, a potentiometer comprising:
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a resistor array comprised of a plurality of cells of resistors, each of said plurality of cells of resistors having a total resistive value; a plurality of wiper points for separating each of said plurality of cells of resistors; means for selecting at least one of said plurality of wiper points; triggering means for triggering potentiometer changes at or near a zero-crossing of the signal being amplified; and an interface means connected to said triggering means, said interface means for interfacing said triggering means to an external switch. - View Dependent Claims (3, 4, 5, 6)
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7. In a system for amplifying a signal, a potentiometer comprising:
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a plurality of cells of resistors, each of said plurality of cells of resistors having a total resistive value; a plurality of wiper points, wherein each of said plurality of cells of resistors are connected by at least one of said plurality of wiper points; a plurality of gate devices for selecting at least one of said plurality of wiper points; a control for triggering potentiometer changes at or near a zero-crossing of the signal being amplified; and an interface connected to the control device. - View Dependent Claims (8, 9, 10)
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Specification