Printed circuit board assembly having an integrated fusible link

• US 5,923,239 A
• Filed: 12/02/1997
• Issued: 07/13/1999
• Est. Priority Date: 12/02/1997
• Status: Expired due to Term

• Current Assignee: Littelfuse Incorporated
• Original Assignee: Littelfuse Incorporated
• Inventors: Krueger, David J, Neuhalfen, Andrew J.
• Primary Examiner(s): Picard, Leo P.
• Assistant Examiner(s): Vortman, Anatoly
• Application Number:
  US08/982,589
• Time in Patent Office: 588 Days
• Field of Search: 337/297, 337/186, 337/152, 337/159, 337/290, 337/295, 337/160, 337/227, 337/296, 29/623
• US Class Current: 337/297
• CPC Class Codes: H01H 69/022 of printed circuit fuses
• CPC Class Codes: H01H 85/046 Fuses formed as printed circuits
• CPC Class Codes: H05K 1/0293 Individual printed conductors which are adapted for modification, e.g. fusable or breakable conductors, printed switches
• CPC Class Codes: H05K 2201/0305 Solder used for other purposes than connections between PCB or components, e.g. for filling vias or for programmable patterns
• CPC Class Codes: H05K 2201/0338 Layered conductor, e.g. layered metal substrate, layered finish layer, layered thin film adhesion layer etched tri-metal structure H05K2201/0361
• CPC Class Codes: H05K 2201/09727 Varying width along a single conductor; Conductors or pads having different widths
• CPC Class Codes: H05K 2201/10181 Fuse

Abstract

A printed circuit board assembly comprising a printed circuit board having a plurality of conductive traces deposited on a surface thereof to define a plurality of electrical circuit geometries. A plurality of thin film fuses are deposited on the printed circuit board, each fuse providing circuit protection to one of the plurality of conductive traces.

Claims

1. An electrical assembly comprising:

an electrically insulating substrate having a first and a second circuit trace on a first surface, the circuit traces composed of a first conductive material having a thickness t_ct, and adapted to have an electrical component connected thereto; and

a fusible link disposed on the first surface of the substrate and portions of the first and second circuit traces and electrically connecting the first and the second circuit traces, the fusible link including a first conductive layer and a second conductive layer the first conductive layer of the fusible link having a thickness, t_cl, which is less than t_ct, the second conductive layer being comprised of a material other than a material comprising the first conductive layer.

2. The electrical assembly of claim 1, wherein the fusible link includes a first and a second terminal pad, the first and second terminal pads physically and electrically connecting the fusible link to the circuit traces.

3. The electrical assembly of claim 1, wherein the electrically insulating substrate includes a plurality of first and second circuit traces on the first surface, the plurality of first and second circuit traces being connected by a plurality of fusible links, respectively.

4. The electrical assembly of claim 3, wherein each fusible link of the plurality of fusible links has a first conductive layer and a second conductive layer, the second conductive layer being comprised of a material other than a material comprising the first conductive layer.

5. The electrical assembly of claim 3, wherein each of the plurality of fusible links includes a first and a second terminal pad, each first and second terminal pad electrically connecting one of the plurality of first and second circuit traces with a respective fusible link.

6. The electrical assembly of claim 1, wherein the first conductive layer of the fusible link connects the first circuit trace to the second circuit trace.

7. The electrical assembly of claim 1, wherein the first conductive layer of the fusible link is comprised of a metal selected from the group consisting of copper, silver, nickel, titanium, aluminum and alloys thereof.

8. The electrical assembly of claim 1 including a protective coating covering the fusible link.

9. The electrical assembly of claim 8 wherein the protective coating comprises a polymeric material.

10. The electrical assembly of claim 9, wherein the polymeric material comprises polycarbonate.

11. The electrical assembly of claim 1, wherein the second conductive layer of the fusible link has a melting point temperature less than a melting point temperature of the first conductive layer of the fusible link.

12. The electrical assembly of claim 1, wherein the second conductive layer of the fusible link comprises tin.

13. The electrical assembly of claim 1, wherein the second conductive layer of the fusible link comprises a mixture of tin and lead.

14. The electrical assembly of claim 1, wherein the first conductive layer of the fusible link comprises copper and the second conductive layer of the fusible link comprises tin.

15. The electrical assembly of claim 1, wherein the electrically insulating substrate is comprised of a material selected from the group consisting of ceramic, glass epoxy, and electrically insulating polymers.

16. A printed circuit board assembly comprising:

a printed circuit board composed of an insulating layer and a conductive layer;

a conductive trace defining an electrical circuit geometry on a first surface of the printed circuit board, the conductive trace having a thickness t_ct, and being formed from the conductive layer of the printed circuit board and having material removed to define a first and a second circuit trace; and

a thin film fuse having a fusible link including a first conductive layer and a second conductive layer, the first conductive layer of the fusible link being disposed on the insulating layer of the printed circuit board and overlapping the first and second circuit traces, the first conductive layer of the fusible link having a thickness t_cl, which is less than t_ct, and being comprised of a material other than a material comprising the conductive layer of the printed circuit and the second conductive layer of the fusible link.

17. The printed circuit board assembly of claim 16 wherein the fusible link includes first and second terminal pads electrically connecting the first and second circuit traces of the conductive trace.

18. The printed circuit board assembly of claim 16, wherein the printed circuit board includes a plurality of conductive traces defining a plurality of electrical circuit geometries, each conductive trace having a first and a second circuit trace, respectively;

and

a plurality of thin film fuses electrically connecting the first and second circuit traces of the conductive traces, respectively.

19. The printed circuit board assembly of claim 16, wherein the conductive trace comprises a metal foil.

20. The printed circuit board assembly of claim 16, wherein the first conductive layer of the fusible link comprises copper.

21. The printed circuit board assembly of claim 16, wherein the circuit traces have a thickness, t_ct and first conductive layer of the fusible link has a thickness, t_cl, t_cl being less than t_ct.

22. The printed circuit board assembly of claim 16, wherein the conductive layer of the printed circuit board is comprised of a metallic foil and the first conductive layer of the fusible link is comprised of an electroless plated metal.

23. The printed circuit board assembly of claim 22, wherein the metallic foil and the electroless plated metal are copper.

24. An electrical assembly comprising:

a first rigid laminar insulating substrate having a first and a second circuit trace having a thickness t_ct, and disposed on a first surface thereof and a thin film fuse integral to the first surface of the substrate, the thin film fuse including a fusible link comprising a first and a second conductive layer, the first conductive layer having a thickness t_cl, which is less than t_ct, the fusible link electrically connecting the first and second circuit traces; and

a second rigid laminar insulating substrate attached to the first laminar insulating substrate and covering the thin film fuse and the entire first and second circuit traces, the second laminar insulating substrate having a first and a second aperture providing access to the first and second circuit traces, respectively.