Apparatus and method of establishing a downlink communication path in a wireless telecommunications system

• US 5,923,668 A
• Filed: 11/06/1997
• Issued: 07/13/1999
• Est. Priority Date: 06/02/1995
• Status: Expired due to Term

• Current Assignee: Monument Bank of Intellectual Property, LLC (Dominion Harbor Enterprises, LLC)
• Original Assignee: Airspan Communications Corporation
• Inventors: Lysejko, Martin
• Primary Examiner(s): Chan, Jason
• Assistant Examiner(s): LEE, CHI HO A
• Application Number:
  US08/966,351
• Time in Patent Office: 614 Days
• Field of Search: 370/503, 370/514, 370/515, 370/516, 370/350, 370/517, 370/518, 370/519, 375/200-210, 375/354, 375/356, 375/362, 375/364, 375/367, 375/365, 375/368, 455/69.6, 455/502
• US Class Current: 370/515
• CPC Class Codes: G06F 9/546 Message passing systems or structures, e.g. queues
• CPC Class Codes: H04B 1/70735 Code identification H04B1/7083 takes precedence
• CPC Class Codes: H04B 1/7075 with code phase acquisition
• CPC Class Codes: H04B 1/7077 Multi-step acquisition, e.g. multi-dwell, coarse-fine or validation
• CPC Class Codes: H04B 1/70775 Multi-dwell schemes, i.e. multiple accumulation times
• CPC Class Codes: H04B 1/7085 using a code tracking loop, e.g. a delay-locked loop
• CPC Class Codes: H04B 2201/70711 with modular structure
• CPC Class Codes: H04B 2201/709709 Methods of preventing interference
• CPC Class Codes: H04J 13/00 Code division multiplex systems for frequency hopping H04B1/713
• CPC Class Codes: H04L 12/403 with centralised control, e.g. polling
• CPC Class Codes: H04L 9/40 Network security protocols
• CPC Class Codes: H04Q 2213/1305 Software aspects
• CPC Class Codes: H04Q 2213/13093 Personal computer, PC
• CPC Class Codes: H04Q 2213/13098 Mobile subscriber
• CPC Class Codes: H04Q 2213/13109 Initializing, personal profile
• CPC Class Codes: H04Q 2213/13199 Modem, modulation
• CPC Class Codes: H04Q 2213/13216 Code signals, frame structure
• CPC Class Codes: H04Q 2213/13298 Local loop systems, access network
• CPC Class Codes: H04Q 2213/13299 Bus
• CPC Class Codes: H04Q 2213/13335 Simulation, emulation
• CPC Class Codes: H04Q 2213/13376 : Information service, downloading of information, 0800/0900 services
• CPC Class Codes: H04W 52/08 : Closed loop power control
• CPC Class Codes: H04W 52/52 : using AGC [Automatic Gain Control] circuits or amplifiers
• CPC Class Codes: H04W 76/10 : Connection setup
• CPC Class Codes: H04W 84/12 : WLAN [Wireless Local Area Networks]
• CPC Class Codes: H04W 84/14 : WLL [Wireless Local Loop]; RLL [Radio Local Loop]

Abstract

A wireless telecommunications system (1) includes a central terminal (10) for transmitting and receiving radio frequency signals to and from a subscriber terminal (20). A downlink communication path is established from a transmitter (200) of the central terminal (10) to a receiver (202) of the subscriber terminal (20). A downlink signal (212) is transmitted from the transmitter (200) to the receiver (202) during setup and operation of the wireless telecommunications system (1). The receiver (202) of the subscriber terminal (20) compares a code and phase of a master code sequence in the downlink signal (212) to a code and phase of a slave code sequence of the receiver (202). The receiver (202) adjusts the phase of the slave code sequence until a match is obtained with the master code sequence. Matching of the slave code sequence to the master code sequence facilitates establishment of the downlink communication path.

Claims

1. A method of establishing a downlink communication path in a wireless telecommunications system, comprising the steps of:

receiving a downlink signal transmitted from a transmitter in a central terminal at a receiver in a subscriber terminal, the downlink signal including a master code sequence of the transmitter in the central terminal;

comparing an entire code and phase of the master code sequence of the transmitter in the central terminal within the downlink signal with an entire code and phase of the slave code sequence of the receiver in the subscriber terminal;

adjusting the phase of the slave code sequence to match the phase of the master code sequence, matching of the entire slave code sequence to the entire master code sequence determines a path delay in order to establish a downlink communication path between the transmitter in the central terminal and the receiver in the subscriber terminal, wherein the phase of the slave code sequence is adjusted in a coarse adjustment mode having one half increments of a chip period; and

verifying establishment of the downlink communication path by repeating the comparing step and the adjusting step across an entire length of the master code sequence.

2. The method of claim 1, wherein the comparing step includes measuring a combined power of the slave code sequence and the master code sequence at each one half increment, the slave code sequence matching the master code sequence when the combined power is at a maximum value.

3. The method of claim 1, further comprising the steps of:

receiving a downlink signal transmitted from a transmitter in a central terminal at a receiver in a subscriber terminal, the downlink signal including a master code sequence of the transmitter in the central terminal;

comparing a code and phase of the master code sequence of the transmitter in the central terminal with a code and phase of the slave code sequence of the receiver in the subscriber terminal;

adjusting the phase of the slave code sequence to match the phase of the master code sequence, matching of the slave code sequence to the master code sequence determines a path delay between the transmitter in the central terminal and the receiver in the subscriber terminal;

continuously monitoring the slave code sequence to maintain a match with the master code sequence;

readjusting the phase of the slave code sequence to match the phase of the master code sequence in response to changes in the path delay between the transmitter in the central terminal and the receiver in the subscriber terminal.

4. A system for establishing a downlink communication path in a wireless telecommunications system, comprising;

a transmitter in a central terminal operable to transmit a downlink signal, the downlink signal having a master code sequence determined by the transmitter;

a receiver in a subscriber terminal operable to receive the downlink signal, the receiver operable to compare an entire code and phase of the master code sequence to an entire code and phase of a slave code sequence corresponding to the receiver, the receiver operable to adjust the phase of the slave code sequence such that the entire slave code sequence matches the entire master code sequence, wherein the receiver incrementally adjusts the phase of the slave code sequence in a coarse adjustment mode having one half increments of a chip period, the receiver operable to verify that the slave code sequence matches the master code sequence by again comparing and adjusting the entire code and phase of the slave code sequence with respect to the entire code and phase of the master code sequence.

5. The system of claim 4, wherein the receiver measures a combined power of the slave code sequence and the master code sequence to determine a match of the slave code sequence to the master code sequence, the slave code sequence matching the master code sequence when the combined power is at a maximum value.

6. The system of claim 4, wherein the receiver is operable to continually monitor the slave code sequence for a match to the master code sequence, the receiver readjusting the phase of the slave code sequence in response to changes in a path delay between the transmitter and the receiver.

7. A subscriber terminal in a wireless telecommunications system, comprising:

a receiver operable to receive a downlink signal, the downlink signal having a master code sequence, the receiver having a slave code sequence, the receiver operable to compare an entire code and phase of the master code sequence to an entire code and phase of the slave code sequence, the receiver operable to adjust the phase of the entire slave code sequence such that the slave code sequence matches the entire master code sequence, wherein the receiver incrementally adjusts the phase of the slave code sequence in a coarse mode having one half increments of a chip period, the receiver operable to verify that the entire slave code sequence matches the entire master code sequence by again comparing and adjusting the entire code and phase of the slave code sequence with respect to the entire code and phase of the master code sequence.

8. The subscriber terminal of claim 7, wherein the receiver measures a combined power of the slave code sequence and the master code sequence, the receiver adjusting the phase of the slave code sequence to identify a maximum value of the combined power, the slave code sequence matching the master code sequence when the combined power is at the maximum value.

9. The subscriber terminal of claim 8, wherein the receiver performs incremental adjustments of the phase of the slave code sequence, the receiver measuring the combined power after each incremental adjustment to the phase of the slave code sequence.