Direct logical block addressing flash memory mass storage architecture
First Claim
1. A mass storage device having nonvolatile memory, the storage device being coupled to an external digital system for storing binary information therefor in the nonvolatile memory, the external digital system including means for generating a plurality of logical block addresses for use in storing or reading data, the storage device comprising:
- a. a volatile memory device having a plurality of volatile memory locations each of which is uniquely addressable by one of the logical block addresses, and wherein each of the volatile memory locations is configured to store a physical block address without requiring the storage of a corresponding logical block address;
b. one or more nonvolatile memory devices having a plurality of nonvolatile data blocks, each block being selectively programmable and erasable, being uniquely addressable by one of the physical block addresses, and having associated therewith a defect flag stored within the one or more nonvolatile memory devices for indicating that an associated block is defective when set; and
c. a controller for receiving a block of data from the external digital system to be stored in the one or more nonvolatile memory devices, for receiving a target logical block address from the external system, for identifying a free block within the nonvolatile data blocks having no data stored therein, for storing the physical block address of the free block in the volatile memory location that corresponds to the target logical block address, and for periodically erasing all blocks of the nonvolatile memory devices having flags which are set, whereby an erase cycle is not needed each time the external system writes to the storage device;
wherein the defect flags are copied from the nonvolatile memory devices to the volatile memory locations during power-up.
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Accused Products
Abstract
A nonvolatile semiconductor mass storage system and architecture can be substituted for a rotating hard disk. The system and architecture avoid an erase cycle each time information stored in the mass storage is changed. Erase cycles are avoided by programming an altered data file into an empty mass storage block rather than over itself as a hard disk would. Periodically the mass storage will need to be cleaned up. These advantages are achieved through the use of several flag, and a map to correlate a logical block address of a block to a physical address of that block. In particular, flags are provided for defective blocks, used blocks, and old versions of a block. An array of volatile memory is addressable according to the logical address and stores the physical address. Furthermore, the volatile memory device is configured to store physical block addresses in volatile memory locations identified by logical block addresses and is configured to store flags in volatile memory locations identified by the physical block addresses. During power-up the physical block addresses are used to address the volatile memory locations and update the flags with shadow flags of the nonvolatile memory.
222 Citations
33 Claims
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1. A mass storage device having nonvolatile memory, the storage device being coupled to an external digital system for storing binary information therefor in the nonvolatile memory, the external digital system including means for generating a plurality of logical block addresses for use in storing or reading data, the storage device comprising:
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a. a volatile memory device having a plurality of volatile memory locations each of which is uniquely addressable by one of the logical block addresses, and wherein each of the volatile memory locations is configured to store a physical block address without requiring the storage of a corresponding logical block address; b. one or more nonvolatile memory devices having a plurality of nonvolatile data blocks, each block being selectively programmable and erasable, being uniquely addressable by one of the physical block addresses, and having associated therewith a defect flag stored within the one or more nonvolatile memory devices for indicating that an associated block is defective when set; and c. a controller for receiving a block of data from the external digital system to be stored in the one or more nonvolatile memory devices, for receiving a target logical block address from the external system, for identifying a free block within the nonvolatile data blocks having no data stored therein, for storing the physical block address of the free block in the volatile memory location that corresponds to the target logical block address, and for periodically erasing all blocks of the nonvolatile memory devices having flags which are set, whereby an erase cycle is not needed each time the external system writes to the storage device; wherein the defect flags are copied from the nonvolatile memory devices to the volatile memory locations during power-up. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14)
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15. A mass storage device having nonvolatile memory, the storage device being coupled to an external digital system for storing binary information therefor in the nonvolatile memory, the storage device for receiving, from the external digital system, a plurality of logical block addresses for identifying the binary information and generating a plurality of physical block addresses corresponding to the logical block addresses, each physical block address for use in identifying locations within the nonvolatile memory for storing or reading the binary information, comprising:
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a. a volatile memory device having a plurality of volatile memory locations each of which is uniquely addressable by one of the logical block addresses and one of the physical block addresses, the volatile memory device configured to store physical block addresses in volatile memory locations identified by the logical block addresses and further being configured to store flags in volatile memory locations identified by the physical block addresses; b. one or more nonvolatile memory devices each having a plurality of nonvolatile data blocks, each block being selectively programmable and erasable, being uniquely addressable by one of the physical block addresses, and having associated therewith shadow flags for indicating the status of the block; and c. a controller operative to receive a block of data, identified by a target logical block address, from the external digital system for storing thereof in the one or more nonvolatile memory devices, to identify a free block within the nonvolatile data blocks having no data stored therein and having a particular physical block address, to store the received block of data and the target logical block address in the free block, to update the shadow flags so as to reflect the current status of the block identified by the target logical block address, and to store the particular physical block address and the shadow flags in the volatile memory location identified by the target logical block address, wherein during power-up the physical block addresses are used to address the volatile memory locations and update the flags thereof with the shadow flags of the nonvolatile data blocks and the logical block addresses that are stored the nonvolatile data blocks are utilized to update the physical block addresses of the volatile memory locations with the physical block address that were most recently assigned to the logical block addresses prior to power-up and further wherein periodically all blocks of the one or more nonvolatile memory devices having shadow flags which are set are erased thereby avoiding the need for an erase cycle each time the external system writes to the storage device. - View Dependent Claims (16, 17, 18, 19, 20, 21, 22, 23)
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24. A method of transferring digital information between a host and one or more nonvolatile memory devices under the direction of a controller and with the use of a volatile memory, the digital information that is to be stored in the one or more nonvolatile memory devices being provided by the host to the controller in the form of blocks identified by logical block addresses and stored in nonvolatile memory blocks identified by physical block addresses stored within the volatile memory, the logical block addresses each being used to uniquely address a corresponding physical block address within the volatile memory, having a plurality of volatile memory locations each of which is uniquely addressable by one of the logical block addresses and one of the physical block addresses, the volatile memory configured to store physical block addresses in volatile memory locations identified by the logical block addresses and further being configured to store flags in volatile memory locations identified by the physical block addresses, each of the one or more nonvolatile memory devices having a plurality of nonvolatile data blocks with each block being selectively programmable and erasable, being uniquely addressable by one of the physical block addresses, and having associated therewith shadow flags for indicating the status of the block, the method comprising:
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receiving target logical block addresses and data organized in blocks from the host, the target logical block addresses for identifying the received data blocks; locating free blocks within the one or more nonvolatile devices identified by physical block addresses; storing the received data blocks and the target logical block addresses in the free blocks; updating shadow flags in corresponding nonvolatile memory blocks so as to reflect the current status of the stored data block; storing the physical block addresses that identify the free blocks in the volatile memory locations identified by the target logical block addresses; storing the shadow flags in flag locations within the volatile memory locations identified by the target logical block addresses; and during power-up, updating the flag locations within the volatile memory locations by using the physical block addresses to address the flag locations and updating the physical block addresses stored within the volatile memory locations with the physical block addresses that were most recently assigned to the target logical block addresses prior to power-up by using the target logical block addresses, wherein periodically all blocks of the nonvolatile memory devices having shadow flags which are set are erased thereby avoiding the need for an erase cycle each time the digital information is transferred from the host to the storage device. - View Dependent Claims (25, 26, 27, 28, 29, 30, 31, 32, 33)
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Specification