Video interface and overlay system and process

• US 5,926,187 A
• Filed: 10/18/1996
• Issued: 07/20/1999
• Est. Priority Date: 10/18/1996
• Status: Expired due to Term

• Current Assignee: Samsung Electronics Co. Ltd.
• Original Assignee: Samsung Electronics Co. Ltd.
• Inventors: Kim, Hoyoung
• Primary Examiner(s): Nguyen, Phu K.
• Assistant Examiner(s): Vo, Cliff N.
• Application Number:
  US08/733,905
• Time in Patent Office: 1,005 Days
• Field of Search: 345/435, 345/433, 345/434, 345/436, 345/438
• US Class Current: 345/629
• CPC Class Codes: G09G 2340/125 wherein one of the images is motion video
• CPC Class Codes: G09G 5/14 Display of multiple viewports

Abstract

A video overlay system includes a bus device including a processor, a local memory, a video interface, and a DMA unit. A host computer passes to the processor the locations of one or more video windows in a graphics image, and the processor prepares a video pixel map in local memory which corresponds the size of the graphics image. The video pixel map has video data for one or more video images in the locations of the video window. The remainder of the video pixel map contains dummy values. The DMA unit moves pixel values from the local memory to the video interface, and the video interface provides the pixel values including both video data and dummy values to an encoder in synchronization with pixel values from another source which represent the graphics image. The encoder generates a video signal from pixel values representing the graphics image except when a key value occurs. When the key value occurs, the encoder uses a pixel value from the video interface in place of the key value.

Claims

1. A video overlay process comprising:

forming a first set of pixel values which represents a frame in a graphics image, wherein within the frame, one or more areas are represented by pixel values that have a key value;

forming a second set of pixel values, wherein pixel values in the second set are in one-to-one correspondence with pixel values in the first set; and

generating a video signal from the pixel values, wherein generating the video signal comprises;

encoding pixel values from the first set except the pixel values in the first set that have the key value; and

encoding pixel values from the second set in place of the pixel values in the first set that have the key value.

2. The process of claim 1, wherein the pixel values in the first set that have the key value represent a plurality of rectangular areas in the graphics image, and the pixel values in the second set that correspond to the pixel values having the key value represent a plurality of video images, wherein the plurality of video images are in one-to-one correspondence with the plurality of rectangular areas.

3. The process of claim 1, wherein a device connected to a bus of a host computer forms the second set of pixel values, and the process comprises the host computer transmitting to the device, information indicating which pixel values in the first set are equal to the key value.

4. The process of claim 3, wherein forming the second set of pixel values comprises forming a pixel map in a local memory of the device such that one or more blocks of pixel values which represent one or more video images are position in the pixel map at locations corresponding to the areas in the graphics image represented by pixel values having the key value.

5. The process of claim 4, wherein forming the second set of pixel values comprises providing dummy values for pixel values in the second set which do not correspond to pixel values in the first set that have the key value.

6. The process of claim 1, wherein encoding pixel values comprises:

simultaneously transmitting to a video encoder a first pixel value from the first set and a second pixel value which is from the second set and corresponds to the first pixel value, wherein the video encoder performs steps including;

determining whether the first pixel value has the key value;

generating the video signal based on the first pixel value in response to determining the first pixel value does not have the key value; and

generating the video signal based on the second pixel value in response to determining the first pixel value has the key value.

7. The process of claim 1, wherein generating the video signal further comprises:

sequentially transmitting the pixel values from the first set to a video encoder;

sequentially transmitting the pixel values from the second set to the video encoder, wherein each pixel value in the second set is transmitted to the video encoder simultaneously with the corresponding value in the first set;

for each pixel value in the first set, determining whether that pixel value has the key value;

generating the video signal based on the pixel value from the first set in response to determining the pixel value does not have the key value; and

generating the video signal based on the pixel value from the second set in response to determining the corresponding pixel value from the first set has the key value.

8. A video overlay system comprising:

a video encoder capable of alternative selecting a first input value and a second input value for generation of a video signal, wherein the first input value is selected unless the first input value has a key value;

a source of pixel values representing a graphics image, wherein the source provides pixel values to the video encoder as the first input value;

a buffer for a frame having dimensions corresponding to dimensions of the graphics image; and

a video interface coupled to the buffer and the video encoder, wherein video interface transfers pixel values from the buffer to the video encoder as the second input value, wherein

the source and the video interface are synchronized so that the video interface provides the pixel values from the buffer in a one-to-one correspondence with the pixel values from the source of video data.

9. The overlay system of claim 8, wherein the video interface is coupled to receive a vertical synchronization signal from the video encoder, and the video interface begins transferring pixel values from the buffer in response to the vertical synchronization signal.

10. The overlay system of claim 9, wherein the video interface is coupled to receive a horizontal synchronization signal from the video encoder, and the video interface begins transferring pixel values from a start of a row in the buffer in response to the horizontal synchronization signal.

11. The overlay system of claim 8, further comprising:

a signal processor which generates the pixel values stored in the buffer; and

a direct memory access control which controls transfers of pixel values from the buffer to the video interface.