Silicon layer arrangement for last mask programmability
First Claim
1. A method for fabricating an application specific integrated circuit, comprising:
- a. forming the application specific integrated circuit from a multitude of silicon layers, including upper silicon layers and lower silicon layers;
b. forming a processor for performing defined calculations, and a random access memory for storing a plurality of variable data values, in the lower layers of the application specific integrated circuit; and
c. forming a read only memory in the upper layers of the application specific integrated circuit; and
d. storing a plurality of control functions and constant data values in the read only memory in the upper layers of the application specific integrated circuit.
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Abstract
A method for fabricating an application specific integrated circuit (ASIC) from a multitude of silicon layers, including upper silicon layers and lower silicon layers. A processor for performing defined calculations and a random access memory (RAM) for storing a plurality of variable data values are formed in the lower layers of the application specific integrated circuit. A read only memory (ROM) is formed in the uppermost layer of the application specific integrated circuit using a metal mask. The plurality of control functions and constant data values stored in the read only memory are required for operation of a particular type of battery with a particular type of battery chemistry, such as a rechargeable nickel metal hydride battery, or a rechargeable lithium ion battery. The invention allows one core ASIC to be programmed into several separate final products, each with a different last mask ROM code layer. The method allows a wafer lot to be processed up to the last mask, and then one of several finishing options can be selected.
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Citations
18 Claims
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1. A method for fabricating an application specific integrated circuit, comprising:
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a. forming the application specific integrated circuit from a multitude of silicon layers, including upper silicon layers and lower silicon layers; b. forming a processor for performing defined calculations, and a random access memory for storing a plurality of variable data values, in the lower layers of the application specific integrated circuit; and c. forming a read only memory in the upper layers of the application specific integrated circuit; and d. storing a plurality of control functions and constant data values in the read only memory in the upper layers of the application specific integrated circuit. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18)
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Specification