Method for sorting integrated circuit devices

• US 5,927,512 A
• Filed: 01/17/1997
• Issued: 07/27/1999
• Est. Priority Date: 01/17/1997
• Status: Expired due to Term

• Current Assignee: Micron Technology, Inc.
• Original Assignee: Micron Technology, Inc.
• Inventors: Beffa, Raymond J.
• Primary Examiner(s): Cherry, Johnny D.
• Assistant Examiner(s): McAllister, Steven B.
• Application Number:
  US08/785,353
• Time in Patent Office: 921 Days
• Field of Search: 209/571, 209/573, 209/583, 209/556, 209/3.1, 209/3.3, 438/FOR 142, 438/14, 438/15, 438/17, 324/759, 324/760, 324/765
• US Class Current: 209/573
• CPC Class Codes: B07C 5/3412 according to a code applied to the object which indicates a property of the object, e.g. quality class, contents or incorrect indication sorting according to size measured by light-responsive means B07C5/10; sorting according to optical properties B07C5/342; for packages B65D79/02; for information carriers G06K7/00
• CPC Class Codes: B07C 5/344 according to electric or electromagnetic properties sorting according to size measured electrically or electronically B07C5/08; material testing by magnetic means G01N24/00, G01N27/00, by electrical means G01N27/00; electrical measuring devices in general G01R; coin testing G07D5/00
• CPC Class Codes: G01R 31/2851 Testing of integrated circuits [IC] G01R31/317 takes precedence; testing individual devices G01R31/26; testing printed circuits G01R31/2801
• CPC Class Codes: H01L 2223/5444 for electrical read out
• CPC Class Codes: H01L 2223/54473 for use after dicing

Abstract

An inventive method for sorting integrated circuit (IC) devices of the type having a substantially unique identification (ID) code, such as a fuse ID, includes automatically reading the ID code of each of the IC devices, and sorting the IC devices in accordance with their automatically read ID codes. The inventive method can be used in conjunction with an IC manufacturing process that includes providing semiconductor wafers, fabricating the IC'"'"'s on each of the wafers, causing each of the IC'"'"'s to store its ID code, separating each of the IC'"'"'s from its wafer to form IC dice, assembling the IC dice into IC devices, and testing the IC devices. The inventive method is useful for, among other things, culling IC reject bins for shippable IC'"'"'s, sorting IC'"'"'s from a wafer lot into those that require enhanced reliability testing and those that do not, and allowing IC'"'"'s fabricated using both a control fabrication process recipe and a new fabrication process recipe under test to be assembled and tested using the same equipment to reduce unintended test variables introduced when the IC'"'"'s are assembled and tested separately.

Claims

1. A method in an integrated circuit (IC) manufacturing process for testing different fabrication process recipes, the method comprising:

providing first and second pluralities of semiconductor wafers;

fabricating a first plurality of IC'"'"'s on each of the first plurality of wafers in accordance with a control recipe;

fabricating a second plurality of IC'"'"'s on each of the second plurality of wafers in accordance with a test recipe;

causing each of the IC'"'"'s on each of the wafers to permanently store a substantially unique identification (ID) code including information identifying each of the IC'"'"'s as part of one of the first and second pluralities of IC'"'"'s;

grouping the first and second pluralities of wafers into one group;

separating each of the IC'"'"'s on each of the wafers from its wafer to form one of a plurality of IC dice;

assembling each of the IC dice into an IC device;

automatically reading the ID code from the IC in each of the IC devices;

testing each of the IC devices; and

sorting each of the IC devices in accordance with the automatically read ID code from the IC in each of the IC devices indicating the IC is from one of the first and second pluralities of IC'"'"'s.