Apparatus for resetting a modem with a variety of additional functions

• US 5,930,527 A
• Filed: 03/12/1997
• Issued: 07/27/1999
• Est. Priority Date: 03/13/1996
• Status: Expired due to Term

• Current Assignee: Samsung Electronics Co. Ltd.
• Original Assignee: Samsung Electronics Co. Ltd.
• Inventors: Shin, Seong-Kee
• Primary Examiner(s): Shin, Christopher B.
• Application Number:
  US08/814,883
• Time in Patent Office: 867 Days
• Field of Search: 395/834, 395/892, 395/882, 395/883, 395/884, 395/891, 395/893, 395/840, 395/841, 395/863, 379/93.28, 327/143, 368/228, 375/222
• US Class Current: 710/72
• CPC Class Codes: H04M 11/06 Simultaneous speech and data transmission, e.g. telegraphic transmission over the same conductors

Abstract

A reset circuit of a modem which permits the exchange of digital data with a remote modem in a computer system having an external reset switch provided thereon for allowing a user to reset the modem. The reset circuit includes a decoder section for receiving information from the computer system and decoding the same information to generate a first reset signal; and a signal output section having a first input terminal coupled to receive occurrence of the first reset signal, and a second input terminal coupled to receive occurrence of a second reset signal generated from the computer system in response to either manual depression of the external reset switch or an execution of a designated program contained in the computer system, for combining occurrence of the first reset signal and the second reset signal to generate a modem reset signal to a reset portion of the modem for resetting operation of the modem.

Claims

1. A reset system for a modem operable in one of a basic modem mode for an exchange of digital data and an additional modem mode for an exchange of specific data in a computer system having an external reset switch provided on the modem and the computer system for allowing a user to reset operation of the modem, said reset system comprising:

means for receiving information from said computer system;

decoder means for decoding the information from said computer system to generate a first reset signal; and

signal output means having a first input terminal coupled to receive occurrence of said first reset signal, and a second input terminal coupled to receive occurrence of a second reset signal generated from said computer system in response to one operation selected from among a manual reset operation of said external reset switch and an operation of a designated program contained in said computer system, for combining occurrence of said first reset signal and said second reset signal to generate a modem reset signal to a reset portion of said modem for resetting operation of said modem.

2. The reset system of claim 1, further comprised of said decoder means comprising:

a first decoder having input ports coupled to receive address signals from said computer system, for decoding the same address signals to produce an enable signal; and

a second decoder having input ports coupled to receive modem function selection signals from said computer system and said enable signal from said first decoder, for decoding the same modem function selection signals upon activation of said enable signal to produce said first reset signal.

3. The reset system of claim 1, further comprised of said signal output means comprising an OR gate for logically combining said first reset signal and said second reset signal to produce said modem reset signal to the reset port of said modem.

4. The reset system of claim 1, further comprising a delay circuit for delaying said first reset signal for synchronizing said modem reset signal with a specific reset active time of said modem.

5. The reset system of claim 1, further comprising an address selector for generating an anti-conflicting port signal in response to reception of a designated one of said address signals generated from said computer system and providing said anti-conflicting port signal to said decoder means upon occurrence of an input port conflict in said decoder means.

6. The reset system of claim 5, further comprised of said address selector comprising a jumper switch for providing said designated one of said address signals directly to said decoder means and an inverter for inverting said designated one of said address signals to be provided to said decoder means.

7. A reset system for a modem operable in one of a basic modem mode for an exchange of digital data and an additional modem mode for an exchange of specific data in a computer system having an external reset switch provided on the modem and the computer system for allowing a user to reset operation of the modem, said reset system comprising:

a first decoder having input ports coupled to receive address signals from said computer system, for decoding the same address signals to produce an enable signal; and

a second decoder having input ports coupled to receive modem function selection signals from said computer system and said enable signal from said first decoder, for decoding the same modem function selection signals upon activation of said enable signal to produce said first reset signal; and

signal output means having a first input terminal coupled to receive occurrence of said first reset signal, and a second input terminal coupled to receive occurrence of a second reset signal generated from said computer system in response to one operation selected from among a manual reset operation of said external reset switch and an operation of a designated program contained in said computer system, for combining occurrence of said first reset signal and said second reset signal to generate a modem reset signal to a reset portion of said modem for resetting operation of said modem.

8. The reset system of claim 7, further comprised of said signal output means comprising an OR gate for logically combining said first reset signal and said second reset signal to produce said modem reset signal to the reset port of said modem.

9. The reset system of claim 7, further comprising a delay circuit for delaying said first reset signal for synchronizing said modem reset signal with a specific reset active time of said modem.

10. The reset system of claim 7, further comprising an address selector for generating an anti-conflicting port signal in response to reception of a designated one of said address signals generated from said computer system and providing said anti-conflicting port signal to said first decoder upon occurrence of an input port conflict in said first decoder.

11. The reset system of claim 10, further comprised of said address selector comprising a jumper switch for providing said designated one of said address signals directly to said first decoder, and an inverter for inverting said designated one of said address signals to be provided to said first decoder.

12. The reset system of claim 11, further comprised of said signal output means comprising an OR gate for logically combining said first reset signal and said second reset signal to produce said modem reset signal to the reset port of said modem.

13. The reset system of claim 12, further comprising a delay circuit for delaying said first reset signal for synchronizing said modem reset signal with a specific reset active time of said modem.

14. A reset system in a computer system having an external reset switch for allowing a user to reset a modem in the computer system, said reset system comprising:

a first decoder having input ports coupled to receive address signals from a computer system, for decoding the address signals to produce an enable signal;

a second decoder having input ports coupled to receive modem function selection signals from said computer system and said enable signal from said first decoder, for decoding the modem function selection signals upon activation of said enable signal from said decoder to produce said first reset signal; and

a logic circuit for generating a modem reset signal to reset operation of said modem by combining said first reset signal and a second reset signal which is generated from said computer system in response to input of either a manual reset operation of said external reset switch or an execution of a designated program contained in said computer system.

15. The reset system of claim 14, further comprised of said logic circuit corresponding to an OR gate for logically combining said first reset signal and said second reset signal to produce said modem reset signal to the reset port of said modem.

16. The reset system of claim 15, further comprised of a delay circuit delaying said first reset signal for synchronizing said modem reset signal with a specific reset active time of said modem.

17. The reset system of claim 14, further comprising an address selector for generating an anti-conflicting port signal in response to reception of a designated one of said address signals generated from said computer system and providing said anti-conflicting port signal to said first decoder upon occurrence of an input port conflict in said first decoder.

18. The reset system of claim 17, further comprised of said address selector comprising a jumper switch for providing said designated one of said address signals directly to said first decoder, and an inverter for inverting said designated one of said address signals to be provided to said first decoder.

19. The reset system of claim 16, further comprising an address selector for generating an anti-conflicting port signal in response to reception of a designated one of said address signals generated from said computer system and providing said anti-conflicting port signal to said first decoder upon occurrence of an input port conflict in said first decoder.

20. The reset system of claim 19, further comprised of said address selector comprising a jumper switch for providing said designated one of said address signals directly to said first decoder, and an inverter for inverting said designated one of said address signals to be provided to said first decoder.