Compact self-aligned body contact silicon-on-insulator transistors

• US 5,930,605 A
• Filed: 07/16/1997
• Issued: 07/27/1999
• Est. Priority Date: 05/20/1996
• Status: Expired due to Fees

• Current Assignee: Hewlett-Packard Development Company, L.P. (HP Inc.)
• Original Assignee: Digital Equipment Corporation (HP Inc.)
• Inventors: Sleight, Jeffrey William, Mistry, Kaizad Rumy
• Primary Examiner(s): Chaudhuri, Olik
• Assistant Examiner(s): COLEMAN, WILLIAM D
• Application Number:
  US08/895,328
• Time in Patent Office: 741 Days
• Field of Search: 257/476, 257/350, 438/179, 438/178, 438/92, 438/167, 438/149, 438/169, 438/534, 438/570, 438/173
• US Class Current: 438/149
• CPC Class Codes: H01L 21/84 the substrate being other than a semiconductor body, e.g. being an insulating body
• CPC Class Codes: H01L 27/1203 the substrate comprising an insulating body on a semiconductor body, e.g. SOI three-dimensional layout H01L27/0688
• CPC Class Codes: H01L 29/7839 with Schottky drain or source contact
• CPC Class Codes: H01L 29/78615 with a body contact

Abstract

A field effect transistor structure having: a first type conductivity semiconductor body disposed on an insulator and having formed in different regions thereof: (a) a source region; (b) a drain region, such source and drain regions being of a conductivity type opposite the conductivity type of the body; (c) a gate electrode adapted to control a flow of carriers in a channel through the semiconductor body between the source and drain regions; and (d) a Schottky contact region providing a Schottky diode between the semiconductor body and one of the source and drain regions. With such an arrangement, the Schottky diode, when forward biased provides a fixed voltage, about 0.3 V, between the semiconductor body and one of the source and drain regions. A method for forming a semiconductor structure, comprising the steps of: providing a semiconductor body over an electrical insulator; providing source and drain areas in the semiconductor body on either side of a gate channel; introducing dopant into un-masked portions of the source and drain areas to form source and drain regions in the semiconductor body, such mask blocking such dopant from passing into the masked portion of at least one of the source and drain areas and the contiguous portion of the semiconductor body; and forming a metal between the masked portion of the at least one of the source and drain regions and the contiguous portion of the semiconductor body. The metal forming step may be performed prior to, or subsequent to, the dopant introduction step.

Claims

1. A method for forming a semiconductor structure, comprising the steps of:

providing a semiconductor body over an electrical insulator;

providing source and drain areas in the semiconductor body on either side of a gate channel;

introducing dopant into un-masked portions of the source and drain areas to form source and drain regions in the semiconductor body, such mask blocking such dopant from passing into the masked portion of at least one of the source and drain areas and the contiguous portion of the semiconductor body; and

depositing a metal between at least one of the source and drain regions and the contiguous portion of the semiconductor body to provide a Schottky diode between at least one of the source and drain regions and the contiguous portion of the semiconductor body.

2. The method recited in claim 1 wherein the metal depositing step is performed prior to the dopant introduction step.

3. The method recited in claim 1 wherein the metal depositing step is performed subsequent to the dopant introduction step.

4. The method for forming a semiconductor structure recited in claim 1 including forming a plurality of Schottky contact regions disposed along a width of one of the source and drain regions.

5. The method for forming a semiconductor structure recited in claim 2 wherein the Schottky contact regions are disposed at a periphery of one of the source and drain regions.

6. The method for forming a semiconductor structure recited in claim 1 including forming a plurality of Schottky contact regions, a first one of such contact regions providing a Schottky diode between the semiconductor body and the source region and a second one of such contact regions providing a Schottky diode between the semiconductor body and the drain region, the first and second contact regions being at different locations along a width of the source and drain regions.

7. A method of making a semiconductor device, the method comprising:

providing a semiconductor region of a first conductivity type;

forming a conductive gate over a channel region of the semiconductor region, the conductive gate being insulated from the channel region;

masking a second region of the of the semiconductor region, the second region being adjacent the channel region;

doping source and drain regions of the semiconductor region with impurities of a second conductivity type opposite the first conductivity type, the source region being separated from the drain region by the channel region; and

forming a metal layer over second region and at least one of the source and drain regions, the metal layer abutting the second region;

wherein the second region and the channel region have substantially the same doping concentration.

8. The method of claim 7 wherein the semiconductor region is provided over an insulating layer.

9. The method of claim 8 wherein the insulating layer is disposed over a semiconductor substrate.

10. The method of claim 7 wherein the metal layer comprises a refractory metal layer.

11. The method of claim 7 wherein the metal layer and underlying portions of the semiconductor region are reacted to form silicide regions.

12. The method of claim 7 wherein masking a second region of the semiconductor region comprises masking a plurality of regions.

13. The method of claim 12 wherein a first of the plurality regions is located adjacent the source region and a second of the plurality of regions is located adjacent the drain region.

14. A method of forming a field effect transistor structure, the method comprising:

providing a first type conductivity semiconductor body disposed on an insulator;

forming a source region in the semiconductor body;

forming a drain region in the semiconductor body, the source and drain regions being of a conductivity type opposite the conductivity type of the semiconductor body;

forming a gate electrode adapted to control a flow of carriers in a channel through the semiconductor body between the source and drain regions; and

forming a Schottky contact region providing a Schottky diode between the semiconductor body and at least one of the source and drain regions.

15. The method of claim 14 wherein the step of forming a Schottky contact region comprises forming a plurality of Schottky contact regions disposed along a width of one of the source and drain regions and extending from the approximate edge of the gate electrode to the approximate edge of the semiconductor body.

16. The method of claim 15 wherein the step of forming a Schottky contact region comprises forming a Schottky contact region at a periphery of one of the source and drain regions.

17. The method of claim 15 wherein the step of forming a Schottky contact region comprises forming a plurality of Schottky contact regions, a first one of the contract regions providing a Schottky diode between the semiconductor body and the source region and a second one of the contact regions providing a Schottky diode between the semiconductor body and the drain region, the first and second contact regions being at different locations along a width of the source and drain regions.