Method to prevent static destruction of an active element comprised in a liquid crystal display device

• US 5,930,607 A
• Filed: 05/30/1997
• Issued: 07/27/1999
• Est. Priority Date: 10/03/1995
• Status: Expired

• Current Assignee: Seiko Epson Corporation (Seiko Group)
• Original Assignee: Seiko Epson Corporation (Seiko Group)
• Inventors: Satou, Takashi
• Primary Examiner(s): Bowers, Charles
• Assistant Examiner(s): CHRISTIANSON, KEITH ALAN
• Application Number:
  US08/849,288
• Time in Patent Office: 788 Days
• Field of Search: 257/57, 257/59, 257/72, 257/356, 438/149, 438/151, 438/158, 438/159, 345/87, 345/90, 345/92, 345/205, 349/40, 349/43, 349/54
• US Class Current: 438/158
• CPC Class Codes: G02F 1/136204 Arrangements to prevent high voltage or static electricity failures
• CPC Class Codes: G02F 2202/103 a-Si
• CPC Class Codes: H01L 2224/48463 the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
• CPC Class Codes: H01L 27/0255 using diodes as protective elements
• CPC Class Codes: H01L 27/0266 using field effect transistors as protective elements
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/13091 Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]

Abstract

A liquid crystal display device which utilizes an active matrix substrate and its substrate, and which is provided with a novel method of manufacture which can reduce the manufacturing process of amorphous silicon thin film transistors of reverse stagger construction, and an electrostatic protection means which is created using this method of manufacture. In a thin film transistor manufacturing process, along with forming an aperture for connecting the contact hole and the external terminal in a manufacturing process for a thin film transistor, utilization is made of ITO film as the wiring. The electrostatic protection means is formed from a bi-directional diode (electrostatic protection element) which is composed utilizing an MOS transistor connected between the electrode (PAD) for connecting the external terminal, and the joint electric potential line. The electrostatic protection element is substantially a transistor, with great current capacity, and utilizing the TFT formation process of pixel components in their existent state, the process can be formed without any complications.

Claims

1. A method of manufacturing a thin film element comprising the steps of:

(A) forming a gate electrode layer, and a gate electrode material layer on a substrate having the same material as the gate electrode layer;

(B) forming a gate insulation film on said gate electrode layer and gate electrode material layer;

(C) forming a channel layer and an ohmic contact layer on said gate insulation film that overlaps horizontally with said gate electrode layer;

(D) forming a source electrode layer and a drain electrode layer that are connected to said ohmic contact layer;

(E) removing said ohmic contact layer from a region between said source electrode layer and the drain electrode layer by etching;

(F) forming a protective film for covering said source electrode layer said drain electrode layer and said gate electrode material layer;

(G) forming a first aperture wherein a part of said gate insulation film and the overlapping layer of the protective film and said gate electrode material layer are selectively etched for exposing a portion of a surface of one of the gate electrode layer and the gate electrode material layer and at the same times, forming a second aperture wherein a portion of the protective film on the source electrode layer and the drain electrode layer are selectively etched for exposing a portion of a surface of one of the source electrode layer and the drain electrode layer; and

(H) connecting an electrically conductive material layer through said first aperture and said second aperture to at least one of the gate electrode layer, the gate electrode material layer, the source electrode layer, and/or the drain electrode layer.

2. The method of manufacturing a thin film element in claim 1, wherein said first aperture formed in said step (G) is one of a contact aperture for connecting a wiring to said gate electrode material layer, and an aperture for connecting an external terminal to said gate electrode material layer.

3. The method of manufacturing a thin film element in claim 1, wherein said electrically conductive material is formed of ITO (indium tin oxide).

4. An active matrix substrate comprising:

a thin film transistor (TFT) connected to a scanning line, a signal line arranged in a matrix state, and a pixel electrode to compose pixel components;

protective means for preventing static electricity destruction using thin film transistors established between at least one of said scanning line and said signal line, or a region electrically equivalent to the at least one of said scanning line and said signal line, and a common electric potential region, said protective means for preventing electrostatic destruction includes a diode wherein a gate electrode layer in the thin film transistor and a source/drain electrode layer are connected; and

a first aperture formed by selectively removing an insulation layer on said gate electrode layer and a second aperture formed in a same manufacturing process by selectively removing an insulating layer on said source/drain electrode layer, said gate electrode layer and said source/drain electrode layer electrically connected via said first aperture and said second aperture by an electrically conductive material layer composed of the same material as said pixel electrode.

5. The active matrix substrate in claim 4, wherein said first aperture passes through the overlapping film of the first insulation film on the gate electrode material layer and passes through the second insulation film on the first insulation film, and the second aperture passes through only the second insulation film on the source/drain electrode layer.

6. The active matrix substrate in claim 4, wherein said pixel electrode and the electrically conductive material layer are formed from ITO (indium tin oxide) film.

7. The active matrix substrate in claim 4, wherein a region electrically equivalent to at least one of the scanning line and the signal line is an electrode for connecting the external terminal, and one of a common electric potential line which applies a standard potential that becomes the standard potential at a time of driving the liquid crystal using alternate current, and a joint electric potential line for commonly connecting the electrode to make the electrode and the one of the common electric potential line and the joint electric potential line the same electric potential.

8. The active matrix substrate in claim 7, wherein the protective means for preventing electrostatic destruction is provided both between the electrode for connecting the external terminal and the common electric potential line and between the electrode for connecting the external terminal and the joint electric potential line.

9. The active matrix substrate in claim 4, wherein said protective means for preventing static electricity destruction includes a bi-directional diode for commonly connecting a first diode anode and a second diode cathode, for commonly connecting a first diode cathode and a second diode anode.

10. A liquid crystal display device using the active matrix substrate described in claim 4.

11. A method of manufacturing an active matrix substrate comprising the steps of:

(A) forming a gate electrode layer, and a gate electrode material layer on a substrate having the same material as the gate electrode layer;

(B) forming a gate insulation film on said gate electrode layer and gate electrode material layer;

(C) forming a channel layer having a gate electrode layer as a plane surface on the gate insulation film;

(D) forming a source/drain electrode layer connected to an ohmic contact layer and for forming a source/drain electrode material layer from the same material as the source/drain electrode layer in a predetermined region on said insulation film;

(E) forming a protective film for covering said source electrode layer, said drain electrode layer and said gate electrode material layer;

(F) forming a first aperture wherein a part of said gate insulation film and the overlapping layer of the protective film on the gate electrode layer and said gate electrode material layer are selectively etched for exposing a portion of a surface of one of the gate electrode layer and the gate electrode material layer and at the same times, forming a second aperture wherein a portion of the protective film on the source/drain electrode layer and source/drain electrode material layer are selectively etched for exposing a portion of a surface of one of the source/drain electrode layer and the source/drain electrode material layer; and

(G) connecting an electrically conductive material layer to at least one of the gate electrode layer, the gate electrode material layer, the source/drain electrode layer and the source/drain electrode material layer through said first aperture and said second aperture.

12. The method of manufacturing an active matrix substrate in claim 11, wherein:

a thin film transistor (TFT) is connected to a scanning line and a signal line;

a pixel electrode is connected to the thin film transistor; and

a diode for preventing electrostatic destruction constructed for connecting a thin film transistor gate electrode layer and the source/drain electrode layer, on the active matrix substrate.

13. The method of manufacturing an active matrix substrate in claim 12, wherein the layer formed from the same layer as the pixel electrode is the electrically conductive material layer.

14. The method of manufacturing an active matrix substrate in claim 11, wherein ITO (Indium Tin Oxide) is the electrically conductive material layer.

15. A method for preventing electrostatic destruction of active elements in an active matrix liquid crystal display device, comprising the steps of:

forming a pixel part including a thin film transistor connected to a scanning line and a signal line arranged in a matrix, and a pixel electrode connected to one end of the thin film transistor;

providing protective means for preventing electrostatic destruction, including a diode having a gate electrode layer in the thin film transistor connected to a source/drain electrode layer; and

connecting the protective means for preventing static electricity destruction between at least one of said scanning line, said signal line, a member electrically equivalent to at least one of said scanning line and said signal line, and a common electric potential line.