Diagnostic system for run-time monitoring of computer operations

• US 5,933,594 A
• Filed: 04/23/1997
• Issued: 08/03/1999
• Est. Priority Date: 05/19/1994
• Status: Expired due to Fees

• Current Assignee: Carl S. Dobbs, Eugene M. Miller, Leslie T. La Joie, Michael B. Solka
• Original Assignee: Carl S. Dobbs, Eugene M. Miller, Leslie T. La Joie, Michael B. Solka
• Inventors: La Joie, Leslie T., Solka, Michael B., Miller, Eugene M., Dobbs, Carl S.
• Primary Examiner(s): TU, CHRISTINE TRINH LE
• Application Number:
  US08/838,959
• Time in Patent Office: 832 Days
• Field of Search: 395/182.08, 395/182.09, 395/182.1, 395/183.1, 395/183.13, 395/183.14, 395/183.15, 395/183.16, 395/183.19, 395/184.01, 395/180, 395/885 , 395/886, 395/887, 395/888, 395/889, 395/890, 395/891, 395/892, 395/893, 395/894, 371/67.1, 371/26, 371/25.1, 371/22.4
• US Class Current: 714/26
• CPC Class Codes: G06F 11/25 Testing of logic operation, e.g. by logic analysers
• CPC Class Codes: G06F 11/273 Tester hardware, i.e. output processing circuits G06F11/263 takes precedence
• CPC Class Codes: G06F 11/277 with comparison between actual response and known fault-free response
• CPC Class Codes: G06F 11/3466 Performance evaluation by tracing or monitoring
• CPC Class Codes: G06F 11/348 Circuit details, i.e. tracer hardware
• CPC Class Codes: G06F 11/349 for interfaces, buses
• CPC Class Codes: G06F 2201/83 the solution involving signatures

Abstract

A monitoring system is coupled to an external computer system by an interface between a data bus internal to the monitoring system and a target bus within the external computer system. Data captured by the monitoring system from the external computer system is provided in parallel to a triggering circuit and to a buffer for temporary storage. The triggering circuit identifies the occurrence of a transaction on the bus of the external computer system and generates a signal to mark a captured data block within the buffer as being characteristic of the triggering transaction. The captured data block is compared with predetermined sets of known transaction data to determine if the captured data block is consistent with the normal operation of the external computer system. A second monitoring facility is provided to perform boundary scan testing on the external computer system.

Claims

1. A monitoring system comprising:

a processing unit coupled to a data bus, the processing unit including a signature analyzer;

a memory coupled to the processing unit, a plurality of predetermined data signatures characteristic of transactions occurring within an external computer system and diagnostic of normal, error-free operation of the external computer system being stored within the memory;

an external bus interface between the data bus and an internal bus within the external computer system, the external bus interface coupled to receive signals from the internal bus within the external computer system and to provide the signals from the external computer system to the data bus;

a comparator within the processing unit, coupled to receive signals provided from the external computer system from the external bus interface, the comparator comparing the signals from the external computer system to at least one of the plurality of predetermined data signatures characteristic of the external computer system to identify a transaction which is inconsistent with normal operation of the external computer system;

a filter and trigger within the processing unit to identify subsets of the signals received from the external computer system, the filter and the trigger being operational in combination to unambiguously identify and describe a transaction;

an external memory coupled to the processing unit; and

a monitoring operation executable by the processing unit, the monitoring operation monitoring a plurality of external computer system transactions to identify a transaction which is inconsistent with normal operation of the external computer system and storing an identification of the identified transaction as an error data signature in the external memory.

2. The monitoring system of claim 1 further comprising:

a processor bus coupled to the processing unit;

a data interface disposed between the processor bus and the data bus, wherein the data interface accommodates differences in data rates between the processor bus and the data bus as data flows from the data bus through the data interface to the processor bus.

3. The monitoring system of claim 2 wherein the data interface comprises a first in, first out buffer for storing in parallel a signal including a first number of data bits, the first number of data bits being different from a number of data bits in a parallel signal carried by the internal bus within the external computer system.

4. The monitoring system of claim 1 wherein the processing unit is switchable to control the internal bus within the external computer system to store data in a memory within the external computer system.

5. The monitoring system of claim 1 wherein the processing unit further comprises a decoder for decoding a data set from the bus of the external computer system and for generating a transaction identification signal characteristic of a transaction within the external computer system associated with the data set.

6. The monitoring system of claim 5 further comprising:

a lookup table stored in a non-volatile memory, wherein the lookup table stores addresses of the plurality of predetermined data signatures within the non-volatile memory; and

means for recalling an address from a position in the lookup table in accordance with the transaction identification signal.

7. The monitoring system of claim 6 wherein the means for recalling generates a lookup table address from the transaction identification signal.

8. A monitoring system according to claim 1, further comprising:

a library of known data signatures stored in the external memory; and

an adaptive controller operation executable by the processing unit, the adaptive controller operation monitoring a plurality of external computer system transactions when the external computer system is operating in a known state and deriving a data signature for inclusion in the library of known data signatures on the basis of the monitored transactions.

9. A monitoring system according to claim 1, further comprising:

a communication port coupled to the data bus and coupled to a remote device;

a communication operation executable by the processing unit, the communication operation monitoring a plurality of external computer system transactions to identify a predetermined transaction and communicating a status condition to the remote device upon occurrence of the identified transaction.

10. A monitoring system according to claim 1, further comprising:

a monitoring operation executable by the processing unit, the monitoring operation monitoring a plurality of external computer system transactions to identify a transaction which is inconsistent with normal operation of the external computer system, switching control of the bus of the external computer system by providing a control signal over the data bus and through the external bus interface to the external computer system and controlling the bus of the external computer system to store data in a memory within the external computer system that corrects the identified transaction.

11. A monitoring system according to claim 1, further comprising:

an external input/output port coupled to the data bus and coupled to the external computer system; and

a monitoring operation executable by the processing unit, the monitoring operation monitoring a physical condition of the external computer system to identify an error condition and resetting the external computer system in response to an identified error condition.

12. A monitoring system comprising:

a processing unit coupled to a data bus;

an interface between the data bus and an external computer system, the interface for coupling to an internal bus within the external computer system to receive signals from the internal bus within the external computer system and to provide signals from the external computer system directly to the data bus;

a latch connected to the data bus for receiving and storing signals from the data bus provided from the interface, the latch storing the signals at a rate at which the signals are provided on the external data bus;

a writable memory for storing a plurality of at least portions of the signals stored within the latch;

a first data path coupled to the latch, wherein the signals from the latch pass along the first data path to the writable memory;

a second data path coupled to the latch;

a trigger circuit to receive the signals provided to the interface from the external computer system along the second data path, the trigger circuit generating a trigger signal on the basis of a comparison between one of the received signals and a predetermined mask pattern representing a state of a bus that is diagnostic between normal, error-free operation and abnormal, incorrect operation of the external computer system, wherein the trigger signal identifies a transaction on the bus of the external computer system;

an external memory coupled to the processing unit; and

a monitoring operation executable by the processing unit, the monitoring operation monitoring a plurality of external computer system transactions to identify a transaction which is inconsistent with normal operation of the external computer system and storing an identification of the identified transaction as an error data signature in the external memory.

13. A system for monitoring operations of a host computer system, the system comprising:

a processor;

a memory coupled to the processor, the memory including a data signature storage for storing a plurality of data signatures characteristic of transactions occurring via the operations of the host computer system, the data signatures being diagnostic of normal, error-free operation of the host computer system;

a host interface for coupling the processor to the host computer system, the host interface including buffers which conform the data size and data timing operating on the host computer system to the data size and data timing operating on the processor; and

an analyzer logic controller coupled to the processor, the analyzer logic controller which identifies a transaction occurring via the operations of the host computer system, establishes a time domain of the transaction, and determines whether the transaction is indicative of normal, error-free operation of the host computer system, the analyzer logic controller further including;

a logic to start a trigger signal, end a trigger and control temporary storage of data capture from the host computer system; and

a clock logic for time stamping the data captured in the temporary storage.

14. A system according to claim 13 wherein the analyzer control logic further includes:

a filter data path;

a temporary storage data path parallel to the filter data path; and

a filter coupled to the filter data path for comparing data in the filter path against a set of triggering masks to identify whether data is indicative of normal, error-free operation.

15. A system according to claim 13 wherein the operations of the host computer system include hardware operations and software operations.

16. A system according to claim 13 further comprising:

an adaptive controller for monitoring a plurality of host computer system transactions when the host computer system is operating in a known state and deriving a data signature of the plurality of data signatures as a function of the monitored host computer system transactions.

17. A system according to claim 13 further comprising:

a monitor operation executable by the processor and monitoring a plurality of host computer system transactions to identify a transaction which is inconsistent with normal operation of the host computer system and for storing an identification of the identified transaction as an error data signature in the memory.

18. A system according to claim 13 further comprising:

a communication port coupled to the processor and coupled to a remote device; and

a communication operation executable by the processor, the communication operation monitoring a plurality of host computer system transactions to identify a predetermined transaction and communicating a status condition to the remote device upon occurrence of the identified transaction.

19. A system according to claim 13 further comprising:

a monitoring operation executable by the processor, the monitoring operation monitoring a plurality of host computer system transactions to identify a transaction that is inconsistent with normal operation of the external computer system and controlling the host interface to communicate data from the processor to a memory of the host computer system, the data correcting the identified transaction.

20. A system according to claim 13 further comprising:

an external input/output port coupled to the processor and coupled to the host computer system;

a monitoring operation executable by the processor, the monitoring operation monitoring a physical condition of the host computer system to identify a physical error condition and resetting the host computer system in response to the identified error condition.