System for managing the caching of data of a mass storage within a portion of a system memory

• US 5,933,848 A
• Filed: 11/08/1996
• Issued: 08/03/1999
• Est. Priority Date: 12/01/1995
• Status: Expired due to Term

• Current Assignee: Hewlett-Packard Development Company, L.P. (HP Inc.)
• Original Assignee: Hewlett-Packard Company (HP Inc.)
• Inventors: Moenne-Loccoz, Philippe
• Primary Examiner(s): Chan, Eddie P.
• Assistant Examiner(s): Portka, Gary J.
• Application Number:
  US08/735,056
• Time in Patent Office: 998 Days
• Field of Search: 711/111, 711/112, 711/113, 711/117, 711/118, 711/154, 395/842, 710/22
• US Class Current: 711/113
• CPC Class Codes: G06F 12/0866 for peripheral storage systems, e.g. disk cache

Abstract

Computers are frequently provided with cache systems to facilitate processor access to data, such systems serving to temporarily store selected data blocks read from a mass storage subsystem. In the present cache system, a portion (19) of system memory (11) is organized as cache memory, and a cache manager (30) is provided that exists separately of the processor (10) and system memory (11). Thus, in one embodiment the cache manager (30) interfaces with a peripheral bus (15) to which the mass storage subsystem (16, 17) is also connected. When the computer operating system (18) wishes to read a particular data block, it issues a request over the computer bus system to the cache manager (30) which, if the block is currently held in the cache (19), returns the cache address of that block. If the requested block is not in the cache, the cache manager (30) initiates the transfer of the block from the mass storage peripheral (16, 17) to the cache memory (19). The actual data block transfer may be performed under the control of the operating system (18) or, if the mass storage subsystem (16, 17) is DMA capable, by the mass storage subsystem itself.

Claims

1. A computer having:

a processor,

a mass storage subsystem for storing data blocks,

system memory a portion of which is organized as cache memory with addressable locations for temporarily storing selected ones of said data blocks,

hardware-configured cache manager, and

a bus system comprising a local bus to which said processor is connected, a memory bus to which said system memory is connected, a peripheral bus to which said cache manager and mass storage subsystem are connected, and an inter-bus interface inter-connecting said local, memory and peripheral buses, said cache manager and said mass storage subsystem connected so as to use said peripheral bus as a common data path;

the processor being operative to run a program for asking the cache manager by a request transmitted over said bus system whether a particular data block is currently in the cache memory, and the cache manager comprising;

association means associating addressable locations of the cache memory, as identified by respective identifiers, with any said selected data blocks currently stored therein,

check means responsive to a said request to check said association means to find whether said particular data block is currently in said cache memory, and

report means operative upon said check means finding that said particular data block is in the cache memory, to return an in-cache indication over said bus system to said program;

said program responding to said in-cache indication to control said processor to access said particular data block via a path consisting of said local bus, said inter-bus interface and said memory bus.

2. A computer according to claim 1, wherein said cache manager and mass storage subsystem share the same interface to said peripheral bus.

3. A computer according to claim 1, wherein said cache manager and mass storage subsystem have respective interfaces to said peripheral bus.

4. A computer according to claim 1, wherein said report means if further operative upon said check means finding that said particular data block is in the cache memory, to return to said program an identifier of the cache location where said particular data block is currently stored.

5. A computer according to claim 1, wherein upon said check means finding, in response to a said request for a said particular data block required for reading, that said particular data block is not in the cache memory, said report means is operative to return to said program a not-in-cache indication together with an identifier of a said cache location to be used for storing said particular data block;

said program, on receiving said not-in-cache indication and said identifier from the report means, causing said particular data block to be transferred from the mass storage subsystem to the cache location indicated by said identifier.

6. A computer according to claim 1, wherein said mass storage subsystem includes block-transfer control means for controlling data block transfers over said bus system, and wherein said cache manager and mass storage subsystem are directly operatively interconnected and share a common interface to said bus system;

said cache manager including transfer-initiation means operative upon said check means finding, in response to a said request for a said particular data block required for reading, that said particular data block is not in the cache memory, to instruct directly said block-transfer means of the mass storage subsystem to transfer said particular data block to a predetermined cache location specified by said transfer-initiation means; and

said report means being further operative to return to said program the said identifier corresponding to said predetermined cache location.