Exponential functional relationship generator method and system for implementation in digital logic
First Claim
1. A method for exponentially expanding the digital signal value of a first valued input digital signal (X) into a second-valued digital output signal (Y) for controlling the setting of a target digital module (D) whereby Y is a dependent variable exponentially related to a digital signal X where X represents the difference between a set-point signal A and a feedback signal C, said method comprising the steps of:
- (a) generating a difference signal X on bus lines of n digital bits where X is the value of said set-point signal (A) reduced by said feedback signal (C) from said target digital module (D);
(b) utilizing said input digital signal (X) plus the integer 1 as an exponent of the base "2" in a gating unit as input to develop a digital output control signal Y on output bus lines of n+q bits for exponentially expansive control of said target digital module, (D), by implementing the sequence of Y=2X+1 -1.
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Abstract
A system and method for developing a digital control signal Y for setting a target module (D) according to a digital setpoint signal A, a digital feedback signal C, a difference digital signal X=A-C in an exponential relationship, such that Y=2X+1 -1. An N bit digital signal X is translated exponentially via a simple, non-complex programmable array logic unit to an expanded N+q digital bit signal providing an exponentially expanded response for the control signal Y to reset the target module D to an optimally desired setting.
13 Citations
8 Claims
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1. A method for exponentially expanding the digital signal value of a first valued input digital signal (X) into a second-valued digital output signal (Y) for controlling the setting of a target digital module (D) whereby Y is a dependent variable exponentially related to a digital signal X where X represents the difference between a set-point signal A and a feedback signal C, said method comprising the steps of:
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(a) generating a difference signal X on bus lines of n digital bits where X is the value of said set-point signal (A) reduced by said feedback signal (C) from said target digital module (D); (b) utilizing said input digital signal (X) plus the integer 1 as an exponent of the base "2" in a gating unit as input to develop a digital output control signal Y on output bus lines of n+q bits for exponentially expansive control of said target digital module, (D), by implementing the sequence of Y=2X+1 -1. - View Dependent Claims (2)
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3. A system for digitally generating a control signal for a target module utilizing an exponential expansion logic circuit for increasing an N bit digital input signal to an N+q bit digital output signal, said system comprising:
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(a) means to develop a digital difference signal X an input bus of N bit lines where X represents the digital difference value between a set-point signal A reduced by a feedback signal C from said target module; (b) means to utilize the binary base "2" raised to the X+1 power for developing a value which is reduced by "1" to generate a resultant digital output signal Y of N+q bits where q represents a digital offset value corresponding to the exponential digital value of X. - View Dependent Claims (4, 5, 6)
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7. A method for developing an output digital control signal Y for controlling a target device (D) where signal Y is an exponentially expanded value of an input digital signal (X) which represents the difference between a digital set-point signal (A) and a digital feedback signal (C) comprising the steps of:
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(a) generating a digital difference signal X as the digital difference between a set-point signal (A) and a feedback signal (C), said signal X designated as a digital input signal to a logic gating unit; (b) feeding said logic gating unit with "mi" digital input lines of said digital input signal X; (c) retrieving from said logic gating unit, which executes the equation of Y=2X+1 -1, an output control signal Y of "mo" digital lines where "mo" is larger in numerical value than "mi". - View Dependent Claims (8)
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Specification