Two-layered TSI process for dual damascene patterning

• US 5,935,762 A
• Filed: 10/14/1997
• Issued: 08/10/1999
• Est. Priority Date: 10/14/1997
• Status: Expired due to Term

• Current Assignee: Industrial Technology Research Institute
• Original Assignee: Industrial Technology Research Institute
• Inventors: Huang, Jammy Chin-Ming, Dai, Chang-Ming
• Primary Examiner(s): Duda, Kathleen
• Application Number:
  US08/949,358
• Time in Patent Office: 665 Days
• Field of Search: 430/312, 430/313, 430/314, 430/316, 430/317, 430/330, 438/723, 438/724
• US Class Current: 430/312
• CPC Class Codes: G03F 7/265 Selective reaction with inorganic or organometallic reagents after image-wise exposure, e.g. silylation
• CPC Class Codes: H01L 21/76811 involving multiple stacked pre-patterned masks
• CPC Class Codes: H01L 21/76813 involving a partial via etch

Abstract

A new method is disclosed for forming dual damascene patterns using a silylation process. A substrate is provided with a tri-layer of insulation formed thereon. A first layer of silylation photoresist is formed on the substrate and is imaged with a hole pattern by exposure through a mask. Using a silylation process, which greatly improves the depth of focus by reducing reflections from the underlying substrate, the regions in the first photoresist adjacent to the hole pattern are affixed to form top surface imaging mask. The hole pattern is then etched in the first photoresist. A second layer of photoresist is formed, and is imaged with a line pattern aligned with the previous hole pattern by exposure through a mask. The line pattern in the second photoresist is etched. The hole pattern in the first photoresist is transferred into the top layer of composite insulation first and then into the middle etch-stop layer by successive etching. The line pattern in the second photoresist layer is transferred into the first photoresist layer through a subsequent resist dry etching process. Finally, the line pattern and the hole pattern are transferred simultaneously into the top and lower layers of the composite insulation layer, respectively, through a final dry oxide etching. Having thus formed the integral hole and line patterns into the insulation layer, metal is deposited into the dual damascene pattern. Any excess metal on the surface of the insulating layer is then removed by any number of ways including chemical-mechanical polishing, thereby planarizing the surface and readying it for the next semiconductor process.

Claims

1. A method of forming a dual damascene pattern employing a single photolithographic top surface imaging process with a dual layered photoresist comprising the steps of:

providing a substrate having a composite layer of insulation deposited thereon whereby said composite layer comprises a first layer of dielectric separated from a second layer of dielectric by an intervening intermediate layer of etch-stop material comprising silicon nitride having a thickness between about 500 to 2000 Å

;

forming a first layer of silylation photoresist on said composite layer of dielectric insulation;

hole patterning said first layer of silylation photoresist by exposing said photoresist using a photo mask;

performing a hard bake of said first layer of silylation photoresist;

treating a surface portion of said first layer of silylation photoresist with a silylation process thereby forming a silylated layer of silylation regions in said first layer of silylation photoresist;

dry etching portions of said first layer of silylation photoresist using said silylated layer of said first layer of silylation photoresist as a mask;

forming a second layer of photoresist on said first layer of silylation photoresist covering said substrate;

line patterning said second layer of photoresist by exposing said second layer of photoresist using a photo mask;

performing wet development to remove portions of said second layer of photoresist to form line pattern in said second layer of photoresist;

etching through said second layer of dielectric underlying said first layer of silylation photoresist using said silylated layer of said first layer of silylation

photoresist as a mask thereby transferring said hole pattern in said first layer of silylation photoresist into said second layer of dielectric;

etching through said intermediate etch-stop layer underlying said second layer of dielectric using said silylated layer of said first layer of silylation photoresist as a mask thereby transferring said hole pattern in said first layer of silylation photoresist into said intermediate layer of dielectric;

etching said first layer of silylation photoresist through said line pattern in said second layer of photoresist thereby transferring said line pattern from said second layer of photoresist into said first layer of photoresist, while at the same time, partially etching said second layer of photoresist, thus reducing the thickness of said second layer of photoresist, and forming a multilayered photoresist structure comprising said second and first layers of photoresist having said line pattern therein;

etching said composite layer of insulation through said multilayered photoresist structure thereby transferring said line pattern in said first layer of silylation photoresist into said second layer of dielectric to form a line trench,

and simultaneously transferring said hole pattern in said intermediate layer of dielectric into said first layer of dielectric to form a contact hole;

ashing and wet stripping said multilayered photoresist structure;

forming a film of metal into said trench and said hole to form a dual damascene structure; and

polishing said film of metal.

2. The method of claim 1, wherein said composite layer of insulation is planarized by means of chemical-mechanical polishing (CMP).

3. The method of claim 1, wherein said first layer of dielectric of said composite layer is phosphosilicate glass (PSG) or TEOS oxide, having a thickness between about 0.3 to 0.7 micrometers (μ

m).

4. The method of claim 1, wherein said second layer of dielectric of said composite layer is phosphosilicate glass (PSG), or TEOS oxide, having a thickness between about 0.3 to 0.7 micrometers (μ

m).

5. The method of claim 1, wherein said first layer of silylation photoresist has a thickness between about 0.40 to 0.80 μ

m.

6. The method of claim 5, wherein said first layer of silylation photoresist is a negative chemical amplification resist (CAR) or Navaloc based resist having a photo acid generator (PAG) or photoacid compound (PAC)component, respectively.

7. The method of claim 1, wherein said hole patterning is accomplished by decomposing said PAG or PAC component in field areas adjacent to said hole pattern in said first layer of silylation photoresist exposed by said exposing through said photo mask.

8. The method of claim 1, wherein said performing a hard bake is accomplished between about 100 to 200°

C. to form cross-linking in said hole pattern in said first layer of silylation photoresist.

9. The method of claim 1, wherein said silylation process is performed with tetra-methyl-di-silazane (TMDS), or HMDS, at a temperature between about 100 to 200°

C.

10. The method of claim 1, wherein said silylated layer has a thickness between about 1000 to 4000 Å

.

11. The method of claim 1, wherein said removal of portions of said first layer of silylation photoresist using said silylated layer as a photomask is accomplished by oxygen (O₂) and SO₂ dry etching in a high density plasma (HDP) dry etcher with a recipe comprising O₂ gas at a flow rate between about 10 to 250 sccm, He at 40 to 80 sccm, SO₂ at 10 to 80 sccm and CF₄ at 0-50 sccm.

12. The method of claim 1, wherein said second layer of photoresist is a negative (or, positive which is exposed using reversed tone mask) chemical amplification resist (CAR) having a photo acid generator (PAG) component.

13. The method of claim 1, wherein said second layer of photoresist has a thickness between about 0.20 to 0.80 μ

m.

14. The method of claim 1, wherein said transferring said hole pattern in said first layer of silylation photoresist into said second layer of dielectric is accomplished in a HDP etcher with etch recipe comprising Ar with a flow rate between about 50 to 150 sccm , CHF₃ between about 10 to 150 sccm, and C₄ H₈ between about 0 to 20 sccm.

15. The method of claim 1, wherein said transferring said hole pattern in said first layer of silylation photoresist into said intermediate layer of dielectric is accomplished in a HDP etcher with etch recipe comprising Ar with a flow rate between about 50 to 150 sccm, CHF₃ between about 10 to 150 sccm, and O₂ between about 0 to 100 sccm.

16. The method of claim 1, wherein said etching said first layer of silylation photoresist through said line pattern in said second layer of photoresist thereby transferring said line pattern from said second layer of photoresist into said first layer of photoresist is accomplished in a HDP resist etcher with etch recipe comprising O₂ with a flow rate between about 10 to 250 sccm, He between about 40 to 80 sccm, SO₂ between about 10 to 80 sccm, and CF₄ between about 0-50 sccm.

17. The method of claim 1, wherein etching said composite layer of insulation through said multilayered photoresist structure thereby transferring said line pattern in said first layer of silylation photoresist into said second layer of dielectric to form a line trench, and simultaneously transferring said hole pattern in said intermediate etch-stop layer of dielectric into said first layer of dielectric to form a contact hole is accomplished in a HDP etcher with etch recipe comprising Ar with a flow rate between about 50 to 150 sccm, CHF₃ between about 10 to 150 sccm, and C₄ F₈ between about 0 to 20 sccm.

19. The method of claim 1, wherein said polishing is accomplished by chemical polishing.

18. A method of forming a dual damascene pattern employing a single photolithographic top surface imaging process with a dual layered photoresist comprising the steps of:

providing a substrate having a composite layer of insulation deposited thereon whereby said composite layer comprises a top layer of dielectric separated from a bottom layer of dielectric by an intervening intermediate layer of dielectric;

forming a first layer of silylation photoresist on said composite layer;

hole patterning and etching said hole into said first layer of silylation photoresist;

silylating said first layer of silylation photoresist to form a silylated glass mask comprising said hole pattern;

transferring said hole pattern in said silylated layer into the top layer of said composite layer of insulation by etching;

transferring said hole pattern in said top layer into the intermediate etch-stop layer of said composite layer of insulation by etching;

forming a second layer of photoresist on said first layer of silylation photoresist;

line patterning said second layer of photoresist;

transferring said line pattern in said second layer of photoresist into said first layer of silylation photoresist by etching;

transferring said line pattern in said first layer of silylation photoresist into said top layer of insulation to form a line trench, and simultaneously transferring said hole pattern in said intermediate layer of insulation into said bottom layer of insulation to form a contact hole; and

forming a film of metal into said trench and said hole to form a dual damascene structure; and

polishing said film of metal.

20. A method of forming a dual damascene pattern employing a single photolithographic top surface imaging process with a dual layered photoresist comprising the steps of:

providing a substrate having a composite layer of insulation deposited thereon whereby said composite layer comprises a top layer of dielectric separated from a bottom layer of dielectric by an intervening intermediate layer of dielectric comprising silicon nitride with a thickness between about 500 to 2000 Å

;

forming a first layer of silylation photoresist on said composite layer;

hole patterning and etching said hole into said first layer of silylation photoresist;

silylating said first layer of silylation photoresist to form a silylated glass mask comprising said hole pattern;

transferring said hole pattern in said silylated layer into the top layer of said composite layer of insulation by etching;

transferring said hole pattern in said top layer into the intermediate etch-stop layer of said composite layer of insulation by etching;

forming a second layer of photoresist on said first layer of silylation photoresist;

line patterning said second layer of photoresist;

transferring said line pattern in said second layer of

photoresist into said first layer of silylation photoresist by etching;

transferring said line pattern in said first layer of silylation photoresist into said top layer of insulation to form a line trench, and simultaneously transferring said hole pattern in said intermediate layer of insulation into said bottom layer of insulation to form a contact hole; and

forming a film of metal into said trench and said hole to form a dual damascene structure; and

polishing said film of metal.

21. The method of claim 20, wherein said first layer of silylation photoresist is (p)-type chemical amplification resist (CAR) having a photo acid generator (PAG) agent, or (p)-type Novalac based photoresist having a photoacid compound (PAC) agent, or (p)-type Novalac based photoresist having a photoacid (PAC) agent.

22. The method of claim 20, wherein said silylating is accomplished with tetra-methyl-di-silazane (TMDS), or HMDS at a temperature between about 100 to 200°

C.

23. The method of claim 20, wherein said silylated glass mask has a thickness between about 1000 to 4000 Å

.

24. The method of claim 20, wherein said second layer of photoresist is (n)-type chemical amplification resist (CAR) having a photo acid generator (PAG) agent, or (p)-type with reversed tone mask.

25. The method of claim 20, wherein said transferring said line pattern in said first layer of silylation photoresist into said top layer of insulation to form a line trench, and simultaneously transferring said hole pattern in said intermediate etch-stop layer of insulation into said bottom layer of insulation to form a contact hole is accomplished in a HDP etcher with etch recipe comprising Ar with a flow rate between about 50 to 150 sccm, CHF₃ between about 10 to 150 sccm, and C₄ H₈ between about 0 to 20 sccm.

26. The method of claim 20, wherein said forming metal into said trench and said hole is accomplished by sputter depositing or electroplating copper or aluminum copper alloy.

27. The method of claim 20, wherein said polishing is accomplished by chemical mechanical polisihing.