Semiconductor reliability test chip
First Claim
1. A semiconductor test chip for simulating various conditions as a result of the manufacture, packaging, and use of said test chip, said test chip comprising:
- a chip including a periphery formed by at least four sides, a plurality of contact pads located substantially adjacent a portion of the periphery of the chip, a portion of the plurality of contact pads being located in a first row and a second row located substantially behind the first row on a portion of at least one side of the chip; and
at least one line located substantially in a scribe area of the chip extending about a portion of the periphery of the chip.
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Accused Products
Abstract
A semiconductor test chip including a plurality test functions. The test functions of the semiconductor test chip include bond pad pitch and size effects on chip design, wire bond placement accuracy regarding placement of the wire bond on the bond pad, evaluation of bond pad damage (cratering) effect on the area of the chip below the bond pad during bonding of the wire on the bond pad, street width effects regarding the use of thinner saw cuts in cutting the individual chips from the wafer, thermal impedance effects for thermal testing capabilities, ion mobility evaluation capabilities and chip on board in flip chip application test capabilities.
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Citations
44 Claims
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1. A semiconductor test chip for simulating various conditions as a result of the manufacture, packaging, and use of said test chip, said test chip comprising:
a chip including a periphery formed by at least four sides, a plurality of contact pads located substantially adjacent a portion of the periphery of the chip, a portion of the plurality of contact pads being located in a first row and a second row located substantially behind the first row on a portion of at least one side of the chip; and
at least one line located substantially in a scribe area of the chip extending about a portion of the periphery of the chip.- View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22)
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23. A semiconductor test chip comprising:
a chip including a periphery formed by at least four sides, a plurality of contact pads located substantially adjacent a portion of the periphery of the chip, the plurality of contact pads forming a plurality of groups of contact pads extending substantially about a portion of the periphery of the chip, each group of the plurality of groups of contact pads including at least a first row of contact pads and at least a second row of contact pads located adjacent the first row of contact pads, a portion of the plurality of contact pads including active circuitry of the chip. - View Dependent Claims (24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44)
Specification