Method of fabricating self-align contact window with silicon nitride side wall

• US 5,936,279 A
• Filed: 10/20/1997
• Issued: 08/10/1999
• Est. Priority Date: 10/20/1997
• Status: Expired due to Term

• Current Assignee: United Microelectronics Corporation
• Original Assignee: United Microelectronics Corporation
• Inventors: Chuang, Andy
• Primary Examiner(s): Meier, Stephen D.
• Application Number:
  US08/954,410
• Time in Patent Office: 659 Days
• Field of Search: 257/346, 257/401
• US Class Current: 257/346
• CPC Class Codes: H01L 21/76897 Formation of self-aligned vias or contact plugs, i.e. involving a lithographically uncritical step self-aligned silicidation on field effect transistors H01L29/665

Abstract

A gate oxide layer, a polysilicon layer are patterned on a substrate. Then, a thermal oxidation is carried out to form the first silicon dioxide layer on the surface of the polysilicon layer. Then, a first silicon nitride layer is patterned on the first silicon dioxide layer, over the top of the polysilicon layer. Then, a second silicon nitride layer is formed on the first silicon dioxide layer and the first silicon nitride layer. Next, a second silicon dioxide layer is formed on the second silicon nitride layer. Then, an etching technique is used to form the side-wall spacers. The side-wall spacers composed of silicon nitride layer and silicon dioxide layer. A dielectric layer is formed on the cap layer, side-wall spacers and silicon dioxide layer. An etch with high selectivity is used to etch the dielectric layer to create a contact hole.

Claims

1. A structure of a semiconductor feature for self-align contact, said structure comprising:

a gate oxide formed on a semiconductor substrate;

a gate formed on said gate oxide;

a nitride cap layer formed on a top surface of said gate;

an oxide layer formed along a surface of said gate and a top surface of said nitride cap layer; and

first side-wall spacers formed on side walls of said gate, said nitride cap layer and on said oxide layer, wherein a portion of said oxide layer is formed under said first side wall spacers, and wherein said first side wall spacers are used as an etching barrier to prevent said gate from exposure during subsequent contact etching.

2. The structure of claim 1, further comprises a second side wall spacers formed on said first side wall spacers.

3. The structure of claim 1, wherein said first side-wall sapcer is composed of silicon nitride.

4. The structure of claim 2, wherein said second side-wall sapcer is composed of silicon dioxide.

5. The structure of claim 1, wherein said first side-wall sapcer is composed of silicon dioxide.

6. The structure of claim 1, wherein said gate includes a metal silicide layer formed thereon.

9. The structure of claim 6, wherein said first side-wall sapcer is composed of silicon nitride.

11. The structure of claim 6, wherein said first side-wall sapcer is composed of silicon dioxide.

12. The structure of claim 6, wherein said gate includes a metal silicide layer formed thereon.

18. The structure of claim 6, wherein said gate includes a metal silicide layer formed thereon.

7. A structure of a semiconductor feature for self-align contact, said structure comprising:

a gate oxide formed on a semiconductor substrate;

a gate formed on said gate oxide;

an oxide layer formed along a surface of said gate;

a nitride cap layer formed over a top surface of said gate and on said oxide layer; and

first side-wall spacers formed on side walls of said gate and said cap layer, wherein said first side wall spacers and said nitride cap are used as an etching barrier to prevent said gate from exposure during subsequent contact etching.

8. The structure of claim 7, further comprises a second side wall spacers formed on said first side wall spacers.

10. The structure of claim 8, wherein said second side-wall sapcer is composed of silicon dioxide.

13. A structure of a semiconductor feature for self-align contact, said structure comprising:

a gate oxide formed on a semiconductor substrate;

a gate formed on said gate oxide;

a nitride cap layer formed over a top surface of said gate;

an oxide layer formed on side-walls of said gate; and

first side-wall spacers formed on side walls of said gate and said nitride cap layer, wherein a portion of said oxide layer is formed under said first side wall spacers, and wherein said first side wall spacers and said nitride cap are used as an etching barrier to prevent said gate from exposure during subsequent contact etching.

14. The structure of claim 13, further comprises a second side wall spacers formed on said first side wall spacers.

15. The structure of claim 13, wherein said first side-wall sapcer is composed of silicon nitride.

16. The structure of claim 14, wherein said second side-wall sapcer is composed of silicon dioxide.

17. The structure of claim 13, wherein said first side-wall sapcer is composed of silicon dioxide.

19. A structure of a semiconductor feature for self-align contact, said structure comprising:

a gate oxide formed on a semiconductor substrate;

a gate formed on said gate oxide;

a nitride cap layer formed on a top surface of said gate;

an oxide layer formed along a surface of said gate and a top surface of said nitride cap layer;

first side-wall spacers composed of nitride or oxide formed on side walls of said gate, said nitride cap layer and on said oxide layer; and

second side wall spacers composed of oxide formed on side walls of said first side wall spacers, wherein a portion of said oxide layer is formed under said first side wall spacers, and wherein said first and second side wall spacers and said nitride cap are used as an etching barrier to prevent said gate from exposure during subsequent contact etching.

20. A structure of a semiconductor feature for self-align contact, said structure comprising:

a gate oxide formed on a semiconductor substrate;

a gate formed on said gate oxide;

an oxide layer formed along a surface of said gate;

a nitride cap layer formed over a top surface of said gate and on said oxide layer;

first side-wall spacers composed of oxide or nitride formed on side walls of said gate and said cap layer; and

second side wall spacers composed of oxide formed on side walls of said first side wall spacers, wherein said first and second side wall spacers and said nitride cap are used as an etching barrier to prevent said gate from exposure during subsequent contact etching.

21. A structure of a semiconductor feature for self-align contact, said structure comprising:

a gate oxide formed on a semiconductor substrate;

a gate formed on said gate oxide;

a nitride cap layer formed over a top surface of said gate;

an oxide layer formed on side-walls of said gate;

first side-wall spacers composed of oxide or nitride formed on side walls of said gate and said cap layer; and

second side wall spacers composed of oxide formed on side walls of said first side wall spacers, wherein a portion of said oxide layer is formed under said first side wall spacers, and wherein said first side wall spacers, said second side wall spacers, and said nitride cap layer are used as an etching barrier to prevent said gate from exposure during subsequent contact etching.