Stacked leads-over chip multi-chip module
First Claim
1. A multi-chip module, comprising:
- a carrier substrate including at least one opening defined therethrough bounded by a periphery and a surface including a plurality of conductive areas thereon, at least one conductive area lying laterally adjacent said at least one opening;
at least one semiconductor die including a plurality of bond pads, said at least one semiconductor die secured to another surface of said substrate with said plurality of bond pads exposed through said at least one opening;
at least one discrete, elongated intermediate conductive element connected to at least one of said plurality of conductive areas and to at least one of said plurality of bond pads, extending through said at least one opening and spaced apart from said periphery; and
at least one other semiconductor die including a plurality of bond pads adjacent said surface and connected to at least another of said plurality of conductive areas.
1 Assignment
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Accused Products
Abstract
A multi-chip module (MCM) and method of manufacturing is disclosed that provides for attachment of semiconductor dice to both sides of the MCM printed circuit board (PCB). Semiconductor dice attached to the top surface of the PCB may be attached by conventional wire bonding, TAB or flip chip methods whereas those semiconductor dice attached to the bottom surface of the PCB are wire bonded or TAB connected to the top surface through openings in the PCB. The openings provide a lead-over-chip (LOC) arrangement for those semiconductor dice attached to the bottom surface resulting in shortened wire bonds. The bottom surface of the PCB may be provided with die recesses into which the openings extend, to receive the dice and bring their active surfaces even closer to the top surface of the PCB for wire bonding.
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Citations
20 Claims
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1. A multi-chip module, comprising:
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a carrier substrate including at least one opening defined therethrough bounded by a periphery and a surface including a plurality of conductive areas thereon, at least one conductive area lying laterally adjacent said at least one opening; at least one semiconductor die including a plurality of bond pads, said at least one semiconductor die secured to another surface of said substrate with said plurality of bond pads exposed through said at least one opening; at least one discrete, elongated intermediate conductive element connected to at least one of said plurality of conductive areas and to at least one of said plurality of bond pads, extending through said at least one opening and spaced apart from said periphery; and at least one other semiconductor die including a plurality of bond pads adjacent said surface and connected to at least another of said plurality of conductive areas. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16)
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17. A semiconductor die assembly, comprising:
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a carrier substrate having a plurality of slots therethrough and a plurality of conductors on a first side of said carrier substantially laterally adjacent said plurality of slots, said conductors in electrical communication with a plurality of conductive elements transversely projecting from said first side for electrically connecting said carrier substrate to a higher-level package; at least one semiconductor die secured to said carrier substrate adjacent a second side thereof and having a plurality of bond pads exposed through said plurality of slots; and at least one individual, elongated intermediate conductive element connected to at least one of said plurality of bond pads, extending through said plurality of slots and spaced apart from a periphery thereof. - View Dependent Claims (18, 19, 20)
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Specification