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Linear feedback shift register, multiple input signature register, and built-in self test circuit using such registers

  • US 5,938,784 A
  • Filed: 10/15/1997
  • Issued: 08/17/1999
  • Est. Priority Date: 10/21/1996
  • Status: Expired due to Term
First Claim
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1. A built-in self test (BIST) circuit formed within a target circuit having a memory, said BIST comprising:

  • a linear feedback shift register (LFSR), including a first logic section having a plurality of XOR gates and selection means, and a first memory which is a part of said memory of said target circuit, for performing a primitive polynomial read out from the memory of the target circuit;

    a multiple input signature register (MISR), including a second logic section which is composed of a plurality of XOR gates and selection means, and a second memory which is a part of said memory of said target circuit, for performing said primitive polynomial from the memory of the target circuit; and

    a BIST control section for controlling data input/output between said first and second memories and said target circuit and providing selection signals for controlling said selection means in said first and second logic sections, said BIST control section controlling said target circuit and comparing operation results of the target circuit.

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