Digital signal clock recovery
First Claim
1. A clock recovery element for recovering a symbol clock having a symbol period from a demodulated signal that includes multilevel digital symbols, wherein each of the multilevel digital symbols has been generated having one of at least two modulation levels, said clock recovery element comprising:
- a level decoder for determining one of a plurality of received states of the demodulated signal during each symbol period, wherein each of the plurality of received states corresponds to one of the at least two modulation levels, and wherein said level decoder generates for each of the plurality of received states a sign signal having transitions at central threshold transition times and a magnitude signal that indicates the magnitude of the demodulated signal;
an edge selector, coupled to said level decoder, for determining selected central threshold transition times based on the value of the magnitude signal before and after each transition; and
a synchronizable clock, coupled to said edge selector, wherein said synchronizable clock is synchronized by the selected central threshold transition times.
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Accused Products
Abstract
A clock recovery circuit for recovering a symbol clock (226) includes a level decoder (210) for determining one of a plurality of received states of a demodulated signal (105) during each symbol period of the symbol clock (226). Each of the plurality of received states corresponds to one of at least two modulation levels. The level decoder (210) generates for each of the plurality of received states a sign signal (212) having transitions at central threshold transition times and a magnitude signal (211). An edge selector (220) determines selected central threshold transition times. A synchronizable clock (225) is synchronized by the selected central threshold transition times, resulting in a significant reduction of symbol clock (226) jitter.
30 Citations
15 Claims
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1. A clock recovery element for recovering a symbol clock having a symbol period from a demodulated signal that includes multilevel digital symbols, wherein each of the multilevel digital symbols has been generated having one of at least two modulation levels, said clock recovery element comprising:
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a level decoder for determining one of a plurality of received states of the demodulated signal during each symbol period, wherein each of the plurality of received states corresponds to one of the at least two modulation levels, and wherein said level decoder generates for each of the plurality of received states a sign signal having transitions at central threshold transition times and a magnitude signal that indicates the magnitude of the demodulated signal; an edge selector, coupled to said level decoder, for determining selected central threshold transition times based on the value of the magnitude signal before and after each transition; and a synchronizable clock, coupled to said edge selector, wherein said synchronizable clock is synchronized by the selected central threshold transition times. - View Dependent Claims (2, 3, 4, 5)
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6. A radio receiver for recovering a symbol clock having a symbol period from a modulated signal that includes multilevel digital symbols, wherein each of the multilevel digital symbols has been generated having one of at least two modulation levels, said radio receiver comprising:
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a receiver element for generating a demodulated signal from the modulated signal; a clock recovery circuit comprising a level decoder for determining one of a plurality of received states of the demodulated signal during each symbol period, wherein each of the plurality of received states corresponds to one of the at least two modulation levels, and wherein said level decoder generates for each of the plurality of received states a sign signal having transitions at central threshold transition times and a magnitude signal that indicates the magnitude of the demodulated signal; an edge selector, coupled to said level decoder, for determining selected central threshold transition times based on the value of the magnitude signal before and after each transition; and a synchronizable clock, coupled to said edge selector, wherein said synchronizable clock is synchronized by the selected central threshold transition times; and a latching device, coupled to said synchronizable clock and said demodulated signal, for latching the received states during each symbol period. - View Dependent Claims (7, 8, 9, 10)
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11. A method used in a receiver for recovering a symbol clock having a symbol period from a demodulated signal that includes multilevel digital symbols, wherein each of the multilevel digital symbols has been generated having one of at least two modulation levels, said method comprising the steps of:
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determining one of a plurality of received states of the demodulated signal during each symbol period, wherein each of the plurality of received states corresponds to one of the at least two modulation levels, and wherein for each of the plurality of received states a sign signal is generated having transitions at central threshold transition times and a magnitude signal is generated that indicates the magnitude of the demodulated signal; determining selected central threshold transition times from the central threshold transition times based on the value of the magnitude signal before and after each transition; and synchronizing a symbol clock by the selected central threshold transition times. - View Dependent Claims (12, 13, 14, 15)
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Specification