Processor having compression and encryption circuitry

• US 5,943,421 A
• Filed: 09/11/1996
• Issued: 08/24/1999
• Est. Priority Date: 09/11/1995
• Status: Expired due to Term

• Current Assignee: Intermec IP Corporation (Honeywell International Inc.)
• Original Assignee: Norand Corporation (Baker Hughes Company)
• Inventors: Grabon, Robert J.
• Primary Examiner(s): CANGIALOSI, SALVATORE A
• Application Number:
  US08/712,341
• Time in Patent Office: 1,077 Days
• Field of Search: 380/4, 380/28, 380/49, 395/381, 395/384
• US Class Current: 380/269
• CPC Class Codes: G06F 12/1408 by using cryptography for digital transmission H04L9/00
• CPC Class Codes: G06F 21/62 Protecting access to data via a platform, e.g. using keys or access control rules
• CPC Class Codes: G06F 21/71 to assure secure computing or processing of information
• CPC Class Codes: G06F 21/72 in cryptographic circuits

Abstract

A data processing system (100) includes a data processor or CPU (102) having decompression circuitry (208, 212) and decryption circuitry (210, 214) that operates on compressed/encrypted data to produce decompressed and decrypted data. The data processing system includes memory (104) in which instructions and data are stored in a compressed (110) and/or encrypted (114) format. The CPU (102) retrieves the compressed/encrypted data over a system bus (106). A bus interface unit (200) within the CPU (102) receives the compressed/encrypted data, decompresses and decrypts the data and stores the data in cache memory (202). An execution unit (204) and other components within the CPU (102) retrieve the decompressed and decrypted data and operate upon it. Alternatively, upon retrieval of compressed/encrypted data from memory (104) the data is stored in cache memory (202) in its compressed/encrypted format. Upon retrieval by the execution unit (204), the data is decompressed and decrypted in preparation for execution by the execution unit (204). A data processing system (400) of the present invention requires that the CPU (402) decrypt encrypted data. Thus, any devices accessing data in the system (400) over a network (426) without decryption by the CPU (402) retrieve encrypted data that cannot otherwise be decrypted.

Claims

1. A data processor comprising:

processor bus;

bus interface unit, connected on a first side to the processor bus and on a second side to a system bus, that retrieves executable code that has been encrypted and compressed from storage over the system bus;

decompression circuitry coupled to the processor bus that receives and decompresses the executable code that has been encrypted and compressed to produce executable code that has been encrypted;

decryption circuitry coupled to the processor bus that receives and decrypts the executable code that has been encrypted to produce executable code that has been decompressed and decrypted; and

at least one execution unit coupled to the processor bus that retrieves and executes the executable code that has been decompressed and decrypted.

2. The data processor of claim 1, further comprising cache memory coupled to the processor bus, and wherein the decryption circuitry writes the executable code that has been decompressed and decrypted to the cache memory and the execution unit retrieves executable code from the cache memory.

3. The data processor of claim 1, further comprising cache memory coupled to the processor bus, wherein the bus interface unit writes the executable code that has been encrypted and compressed to the cache memory, wherein the decompression circuitry reads the executable code that has been decompressed and encrypted from the cache memory upon request from the execution unit, decompresses the executable code that has been compressed and encrypted to produce the executable code that has been encrypted and wherein the decryption circuitry receives and decrypts the executable code that has been encrypted and provides executable code to the execution unit.

4. The data processor of claim 3, wherein the cache memory comprises a decompression workspace and a conventional portion.

5. The data processor of claim 1, wherein the decompression circuitry employs hash lookup techniques to decompress the executable code that has been encrypted and compressed.

6. The data processor claim 1, further comprising:

a network connection coupled to the system bus; and

bulk storage connected to the system bus that store executable code in an encrypted format that is decryptable only by the decryption circuitry.

7. A data processor comprising:

processor bus;

bus interface unit, connected on a first side to the processor bus and on a second side to a system bus, that retrieves executable code that has been compressed and encrypted from storage over the system bus;

decryption circuitry coupled to the processor bus that receives and decrypts the executable code that has been compressed and encrypted to produce executable code that has been compressed;

decompression circuitry coupled to the processor bus that receives and decompresses the executable code that has been compressed to produce executable code that has been decrypted and decompressed; and

at least one execution unit coupled to the processor bus that retrieves and executes the executable code that has been decrypted and decompressed.

8. The data processor of claim 7, further comprising cache memory coupled to the processor bus, and wherein the decompression circuitry writes executable code that has been decrypted and decompressed to the cache memory and the execution unit retrieves the executable code from the cache memory.

9. The data processor of claim 7, further comprising cache memory coupled to the processor bus, wherein the bus interface unit writes the executable code that has been compressed and encrypted to the cache memory, wherein the decryption circuitry reads the executable code that has been compressed and encrypted from the cache memory upon request from the execution unit, decrypts the executable code to produce executable code that has been compressed and wherein the decompression circuitry decompresses the executable code that has been compressed and provides executable code to the execution unit.

10. The data processor of claim 9, wherein the cache memory comprises a decryption workspace and a conventional portion.

11. The data processor of claim 7, wherein the decryption circuitry employs hash lookup techniques to decrypt the executable code that has been compressed and encrypted.

12. The data processor claim 7, further comprising:

a network connection coupled to the system bus; and

bulk storage connected to the system bus that includes entries stored in an encrypted format that is decryptable only by the decryption circuitry.

13. A method of receiving and processing executable code in a processor including internal decompression circuitry, internal decryption circuitry and internal execution circuitry, comprising:

receiving executable code that has been encrypted and compressed into the processor;

decompressing within the processor, by the decompression circuitry, the executable code that has been encrypted and compressed to obtain executable code that has been encrypted;

decrypting within the processor, by the decryption circuitry, the executable code that has been encrypted to obtain decompressed and decrypted executable code; and

executing, by the execution circuitry, the decompressed and decrypted executable code within the processor.

14. The method of claim 13, further comprising:

storing the decompressed and decrypted executable code within the processor prior to executing the decompressed and decrypted executable code.

15. The method of claim 13, further comprising:

storing the executable code that has been encrypted and compressed within the processor prior to decompressing and decrypting the executable code that has been encrypted and compressed.

16. A method of receiving and processing executable code in a processor including internal decryption circuitry, internal decompression circuitry and internal execution circuitry, comprising:

receiving executable code that has been compressed and encrypted into the processor;

decrypting, by the decryption circuitry, the executable code that has been compressed and encrypted within the processor to obtain executable code that has been compressed;

decompressing, by the decompression circuitry, the executable code that has been compressed to obtain executable code; and

executing, by the execution circuitry, the executable code within the processor.

17. The method of claim 16, further comprising:

storing the executable code that has been decrypted and decompressed within the processor prior to executing the executable code that has been decrypted and decompressed.

18. The method of claim 16, further comprising:

storing the executable code that has been compressed and encrypted within the processor prior to decrypting and decompressing the executable code that has been compressed and encrypted.