Computer communication network having a packet processor with subsystems that are variably configured for flexible protocol handling
First Claim
1. A communication system adapted for coupling to a public switched telephone network (PSTN), said communication system comprising:
- a computer system;
a router interposed within a path of data which exists between the computer system and the PSTN for routing data to and from the computer system, said router comprises;
a communication port coupled within the path of data, wherein said data is divided into a plurality of packets containing a first set of fields which are formatted according to a first communication protocol;
means for changing the first set of fields to a second set of fields, wherein the second set of fields conform to a second communication protocol; and
a processor coupled to receive said plurality of packets, wherein said processor is configured to perform processing in response to said first set of fields during a first time period, and wherein said processor re-configured to perform processing in response to said second set of fields during a second time period,wherein said processor is re-configured by programming at least a portion of an array of logic cells, each logic cell contains both combinatorial logic and sequential logic.
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Accused Products
Abstract
A communication system is provided that includes a mechanism for recognizing various communication protocols. That is, the communication system employs a packet processor which can adapt to sent and receive numerous protocols. The packet processor forms a part of a network adapter card or router associated with a LAN or a WAN. The packet processor includes subsystems which can be selectively re-configured so that the processor can dispatch and recognize differing protocols. More specifically, the re-configurable processor can dispatch and recognize differing packet and field formats associated with various communication protocols. Re-configuration is performed on select subsystems using at least a portion of a field programmable logic cell if not portions of numerous logic cells confined within defined areas on which the integrated processor is fabricated. As such, the logic cells can be programmed at the user site and, after program, function at a high performance level.
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Citations
21 Claims
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1. A communication system adapted for coupling to a public switched telephone network (PSTN), said communication system comprising:
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a computer system; a router interposed within a path of data which exists between the computer system and the PSTN for routing data to and from the computer system, said router comprises; a communication port coupled within the path of data, wherein said data is divided into a plurality of packets containing a first set of fields which are formatted according to a first communication protocol; means for changing the first set of fields to a second set of fields, wherein the second set of fields conform to a second communication protocol; and a processor coupled to receive said plurality of packets, wherein said processor is configured to perform processing in response to said first set of fields during a first time period, and wherein said processor re-configured to perform processing in response to said second set of fields during a second time period, wherein said processor is re-configured by programming at least a portion of an array of logic cells, each logic cell contains both combinatorial logic and sequential logic. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9)
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10. A host adapter operably placed in a communication path of a network of computers, said host adapter comprising:
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a communication port coupled within the communication path for transferring data arranged within a first packet, wherein the first packet is formatted according to a field indicative of a first communication protocol; said communication port is also coupled for transferring data arranged within a second packet, wherein the second packet is formatted according to a field indicative of a second communication protocol; and a processor comprising a series of subsystems contained upon a single monolithic substrate, wherein at least one of said series of subsystems is configured with at least a portion of an array of logic cells programmed to recognize and execute the data within said first packet, and wherein at least one of the series of subsystems is re-configured with at least a portion of the array of logic cell re-programmed to recognize and execute the data within said second packet. - View Dependent Claims (11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21)
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Specification