Method for fabricating thin film transistor device

• US 5,943,593 A
• Filed: 05/22/1998
• Issued: 08/24/1999
• Est. Priority Date: 11/10/1995
• Status: Expired due to Term

• Current Assignee: Japan Display West Incorporated (Japan Display Incorporated)
• Original Assignee: Sony Corporation (Sony Group Corp.)
• Inventors: Noguchi, Takashi, Shimogaichi, Yasushi
• Primary Examiner(s): Niebling, John F.
• Assistant Examiner(s): LATTIN, CHRISTOPHER W
• Application Number:
  US09/083,926
• Time in Patent Office: 459 Days
• Field of Search: 438/164, 438/166, 438/301, 438/487, 438/585, 438/593, 257/66
• US Class Current: 438/487
• CPC Class Codes: H01L 21/02532 Silicon, silicon germanium, germanium
• CPC Class Codes: H01L 21/02686 Pulsed laser beam
• CPC Class Codes: H01L 29/66765 Lateral single gate single channel transistors with inverted structure, i.e. the channel layer is formed after the gate
• CPC Class Codes: Y10S 117/904 Laser beam
• CPC Class Codes: Y10S 148/091 Laser beam processing of fets

Abstract

A method for crystallizing a portion of a semiconductor thin film while forming a semiconductor device comprises providing a transparent substrate supporting a metallic gate electrode and an amorphous semiconductor thin film which are separated from each other by a gate insulating film, heating the gate electrode by subjecting it to light rays, and applying a laser beam to the amorphous semiconductor thin film so that the portion of the semiconductor thin film adjacent the metallic gate electrode is heated by both the laser beam and the heat of the gate electrode to cause a crystallization of a portion of the amorphous thin film and then processing the remaining amorphous portions of the thin film to form the transistor structure.

Claims

1. A method for fabricating a thin film transistor device having a polycrystalline semiconductor thin film to form a channel region, and a gate electrode which intersects the channel region, comprising the steps of:

forming a structure comprising an amorphous semiconductor thin film separated by a gate insulating layer from a gate electrode on an insulating substrate; and

irradiating the amorphous semiconductor thin film with an energy beam having a rectangular irradiation area to convert the amorphous semiconductor thin film into a polycrystalline semiconductor thin film while relatively moving said energy beam along a scan direction which is orthogonal to the gate electrode and is parallel to the channel region.

2. A method according to claim 1, wherein said irradiation step is a process for irradiating an amorphous semiconductor thin film to form a polycrystalline semiconductor thin film of the thin film transistor connected to a pixel electrode formed on the insulating substrate.

3. A method according to claim 1, wherein said irradiation step is a process for irradiating an amorphous semiconductor thin film to form a polycrystalline semiconductor thin film of the thin film transistor comprised of peripheral driving circuit for an active matrix array.

4. A method according to claim 1, wherein said irradiation step is a process for irradiating an amorphous semiconductor thin film to be converted to a polycrystalline semiconductor thin film comprised of a bottom gate TFT which has a structure of a semiconductor thin film formed on the gate insulating layer above the gate electrode.

5. A method according to claim 1, wherein said irradiation step is performed by moving the energy beam.

6. A method according to claim 1, wherein said irradiation step is performed by partially overlapping irradiation of energy beam.

7. A method according to claim 1, further comprising steps of forming source and drain regions which comprise doping an impurity to the polycrystalline semiconductor thin film and activating the doped impurity by irradiating an energy beam.

8. A method according to claim 1, wherein the step of irradiating includes applying heat rays from a side of the gate electrode to heat the gate electrode.