Mobile client computer system with flash memory management utilizing a virtual address map and variable length data

• US 5,943,692 A
• Filed: 04/30/1997
• Issued: 08/24/1999
• Est. Priority Date: 04/30/1997
• Status: Expired due to Term

• Current Assignee: International Business Machines Corporation
• Original Assignee: International Business Machines Corporation
• Inventors: Miller, Brent A., Satran, Julian, Sheinwald, Dafna, Marberg, John M.
• Primary Examiner(s): Gossage, Glenn
• Application Number:
  US08/848,372
• Time in Patent Office: 846 Days
• Field of Search: 711/103, 711/170, 711/171, 711/173, 711/202, 711/203, 711/206, 711/209, 707/205, 707/206, 365/185.29, 365/185.33
• US Class Current: 711/203
• CPC Class Codes: G06F 11/1435 using file system or storage system metadata
• CPC Class Codes: G06F 12/0246 in block erasable memory, e.g. flash memory
• CPC Class Codes: G06F 2212/401 Compressed data
• CPC Class Codes: G06F 2212/7201 Logical to physical mapping or translation of blocks or pages

Abstract

A computer system such as a mobile client system in which provision is made for management of flash memory. Flash memory management is done using variable block length and supports data compression. Blocks are allocated contiguously in each erase unit and each block starts with a header that contains the length of the block. Blocks are tracked using a single-level virtual address map which resides in random access memory (RAM). The mobile computer system may also include a housing, processor, random access memory, display and an input digitizer such as a touchscreen.

Claims

1. A mobile client computer system comprising:

a housing sized to be held and manipulated by the hand of a user;

a processor mounted within said housing for processing digital data;

random access memory mounted within said housing for storing digital data and coupled to said processor;

flash memory coupled to said processor for storing in a plurality of erase units variable length blocks of digital data;

a display mounted in said housing and coupled to said processor and said random access memory for displaying information derived from digital data processed by said processor;

an input digitizer mounted in said housing and overlaying said display, said digitizer being coupled to said processor for input of digital data by a user; and

a flash memory management control program stored in said random access memory and accessible by said processor for managing data stored in said flash memory,

said flash memory management control program and said processor cooperating, when said control program is executing, in

(1) establishing a virtual address map for blocks of data stored in said flash memory, and

(2) allocating within erase units of said flash memory contiguous blocks each having a header and a variable length data field.

2. A mobile client computer system according to claim 1 wherein said virtual address map is stored in said random access memory.

3. A mobile client computer system according to claim 1 wherein data stored in said variable length data field in said flash memory is compressed.

4. A mobile client computer system according to claim 1 wherein said flash memory management control program allocates blocks within said flash memory with the header of one block located immediately after the data of the next previous block.

5. A mobile client computer system according to claim 1 wherein the header of each allocated block contains information defining the length of the associated data field, the virtual address, and a specification of whether the data stored is compressed.

6. A computer comprising:

a housing;

a processor mounted within said housing and processing digital data;

random access memory mounted within said housing for storing digital data and coupled to said processor;

flash memory coupled to said processor for storing in a plurality of erase units variable length blocks of digital data;

a display coupled to said processor and said random access memory for displaying information derived from digital data processed by said processor;

an input device coupled to said processor for input of digital data by a user; and

a flash memory management control program stored in said random access memory and accessible by said processor for managing data stored in said flash memory,

said flash memory management control program and said processor cooperating, when said control program is executing, in

(1) establishing a virtual address map for blocks of data stored in said flash memory, and

(2) allocating within erase units of said flash memory contiguous blocks each having a header and a variable length data field.

7. A computer system according to claim 6 wherein said virtual address map is stored in said random access memory.

8. A computer system according to claim 6 wherein data stored in said invariable length data field in said flash memory is compressed.

9. A computer system according to claim 6 wherein said flash memory management control program allocates blocks within said flash memory with the header of one block located immediately after the data of the next previous block.

10. A system according to claim 6 wherein said header of each allocated block contains information defining the length of the associated data field, the virtual address, and a specification of whether the data stored is compressed.

11. A display generating system comprising:

a housing;

a processor mounted within said housing and processing digital data;

random access memory mounted within said housing for storing digital data and coupled to said processor;

flash memory coupled to said processor for storing in a plurality of erase units variable length blocks of digital data;

said processor and said random access memory and said flash memory cooperating in supplying digital data driving a display of visual images; and

a flash memory management control program stored in said random access memory and accessible by said processor for managing data stored in said flash memory,

said flash memory management control program and said processor cooperating, when said control program is executing, in

(1) establishing a virtual address map for blocks of data stored in said flash memory, and

(2) allocating within erase units of said flash memory contiguous blocks each having a header and a variable length data field.

12. A system according to claim 11 wherein said virtual address map is stored in said random access memory.

13. A system according to claim 11 wherein data stored in said variable length data field in said flash memory is compressed.

14. A system according to claim 11 wherein said flash memory management control program allocates blocks within said flash memory with the header of one block located immediately after the data of the next previous block.

15. A system according to claim 11 wherein said header of each allocated block contains information defining the length of the associated data field, the virtual address, and a specification of whether the data stored is compressed.