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Integrated circuit and method for decorrelating an instruction sequence of a program

DC
  • US 5,944,833 A
  • Filed: 11/07/1997
  • Issued: 08/31/1999
  • Est. Priority Date: 03/07/1996
  • Status: Expired due to Term
First Claim
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1. A process including a main program having interrupt sequences arranged to execute at least one operation and at least one instruction sequence in a microprocessor in synchronization with internal or external electrical signals of an integrated circuit comprising means for decorrelating an execution of the at least one instruction sequence of the program from the internal or external electrical signals of the integrated circuit so that the execution of the at least one instruction sequence is desynchronized with respect to the internal or external electrical signals, characterized in that the process comprises at least one of the following steps:

  • a) triggering the sequencing of one of at least one instruction or at least one operation with the aid of a random-pulse clock;

    b) randomly triggering the interrupt sequences;

    c) triggering the processing of a random sequence of instructions or operations during the execution of a main sequence of instructions or operations;

    d) combining at least two of steps a, b and c.

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