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Data access arrangement

  • US 5,946,393 A
  • Filed: 02/10/1997
  • Issued: 08/31/1999
  • Est. Priority Date: 02/10/1997
  • Status: Expired due to Term
First Claim
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1. A data access arrangement circuit for coupling a telephone line pair to a current driven communications transfer device, wherein the telephone line pair comprises a tip terminal and a ring terminal, and wherein the current driven communications transfer device includes first and second terminals, the data access arrangement circuit comprising:

  • a first transistor having a control terminal and first and second current terminals, wherein the first current terminal is DC coupled to the tip terminal and the first terminal of the current driven communications transfer device;

    a second transistor having a control terminal and first and second current terminals, wherein the first current terminal of the second transistor is DC coupled to the second terminal of the current driven communications transfer device, and the second current terminal of the second transistor is DC coupled to the second current terminal of the first transistor to form a summing node having a voltage;

    a first resistor DC coupled between the ring terminal and a sense node;

    a current drive circuit having input and output terminals, wherein the input terminal is AC coupled to the tip terminal, the output terminal is DC coupled to the control terminal of the second transistor, the current drive circuit operative to generate a current drive signal at the output terminal that causes a first current to flow between the first and second current terminals of the second transistor, and the current drive circuit is also operative to modulate the current drive signal in response to an audio input signal present at the tip and ring terminals and received at the input terminal of the current drive circuit; and

    a current correction circuit having input and output terminals, wherein a line input terminal is DC coupled to the summing node, and wherein the output terminal of the current correction circuit is DC coupled to the control terminal of the first transistor, current correction circuit operative to generate a current correction signal at the output terminal of the current correction circuit to cause a second current to flow between the first and second current terminals of the first transistor, wherein the current correction circuit is operative to modulate the current correction signal in response to the voltage at the summing node received at the input terminal of the current correction circuit such that a third current flowing between the summing node and the ring terminal through the first resistor remains at a substantially constant predetermined magnitude.

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