Method for manufacturing sensor using semiconductor

• US 5,946,549 A
• Filed: 05/28/1997
• Issued: 08/31/1999
• Est. Priority Date: 05/29/1996
• Status: Expired due to Fees

• Current Assignee: Kabushiki Kaisha Tokai RIKA Denki Seisakusho
• Original Assignee: Kabushiki Kaisha Tokai RIKA Denki Seisakusho
• Inventors: Iwata, Hitoshi, Itoigawa, Koichi
• Primary Examiner(s): Trinh, Michael
• Application Number:
  US08/864,152
• Time in Patent Office: 825 Days
• Field of Search: 438/53, 438/52, 438/FOR 412, 148/DIG. 159, 73/514.21, 73/514.32, 73/777, 257/418, 257/419, 257/417, 257/254
• US Class Current: 438/53
• CPC Class Codes: B81C 1/00246 Monolithic integration, i.e. micromechanical structure and electronic processing unit are integrated on the same substrate
• CPC Class Codes: H01L 29/84 controllable by variation of applied mechanical force, e.g. of pressure

Abstract

A method for manufacturing sensors using semiconductors that is optimal for obtaining compact sensors is described. The method includes the steps of (a) applying an n-type silicon layer to the upper surface of a silicon substrate, (b) applying a p-type silicon layer on either the upper surface of the n-type silicon layer or the upper surface of a base, (c) removing part of the p-type silicon layer by electrochemical etching, (d) joining the base with the p-type silicon layer applied to the n-type silicon layer or joining the n-type silicon layer with the p-type silicon layer applied to the base, (e) removing the silicon substrate and exposing the upper surface of the n-type silicon layer, and (f) forming a strain gage in a section of the upper surface of the silicon substrate so that a portion of the n-type silicon layer facing the upper surface of the base functions as a diaphragm.

Claims

1. A method for manufacturing a sensor employing a semiconductor, said method comprising the steps of:

(a) applying an n-type silicon layer to an upper surface of a silicon substrate;

(b) applying a p-type silicon layer on either the upper surface of said n-type silicon layer or an upper surface of a base;

(c) removing part of said p-type silicon layer by performing electrochemical etching;

(d) joining said base with said p-type silicon layer applied to the n-type silicon layer or joining said n-type silicon layer with said p-type silicon layer applied to the base;

(e) removing said silicon substrate and exposing the upper surface of said n-type silicon layer; and

(f) forming a strain gage in a section of the upper surface of said silicon substrate, wherein a portion of said n-type silicon layer facing the upper surface of said base functions as a diaphragm.

2. The method according to claim 1, wherein said n-type silicon layer has a lower surface facing the upper surface of said base, wherein the p-type silicon layer has sidewalls that form when the p-type silicon layer is removed, and wherein the rear surface of said n-type silicon layer, the sidewalls of said p-type silicon layer, and the upper surface of said base define a reference pressure chamber.

3. The method according to claim 2, wherein step (d) includes joining said base with said p-type silicon layer applied to the n-type silicon layer or joining said n-type silicon layer with said p-type silicon layer applied to the base in a vacuum state to maintain the pressure of said reference pressure chamber in a vacuum state.

4. The method according to claim 1, wherein said steps (a) and (b) is replaced with a step of preparing a silicon substrate having an n-type silicon layer applied to the upper surface of the silicon substrate and a p-type silicon layer applied to the upper surface of said n-type silicon layer.

5. The method according to claim 4, wherein said n-type silicon layer is formed by epitaxial growth on the upper surface of said silicon substrate, and wherein said p-type silicon layer is formed by epitaxial growth on the upper surface of said n-type silicon layer.

6. The method according to claim 1, wherein said step (a) is replaced with a step of preparing a silicon substrate having an n-type silicon layer applied to the upper surface of the silicon substrate, and said step (b) includes a step of applying a p-type silicon layer to the upper surface of a base made of n-type silicon.

7. The method according to claim 6, wherein said n-type silicon layer is formed by epitaxial growth on the upper surface of said silicon substrate, and wherein said p-type silicon layer is formed by epitaxial growth on the upper surface of said base.

8. The method according to claim 1, wherein said sensor is a pressure sensor.

9. A method for manufacturing a sensor employing a semiconductor, said method comprising the steps of:

(a) applying an n-type silicon layer to an upper surface of a silicon substrate;

(b) applying a p-type silicon layer to the upper surface of said n-type silicon layer;

(c) removing part of said p-type silicon layer by electrochemical etching so that the n-type silicon layer has a first portion on which the p-type silicon layer is arranged and a second portion extending integrally from said first portion;

(d) joining said p-type silicon layer with a base;

(e) removing said silicon substrate to expose the upper surface of said n-type silicon layer;

(f) forming a strain gage in said upper surface of the n-type silicon layer at said second portion; and

(g) cutting said base and a portion of said second portion so that said second portion has a free end thus allowing part of the remaining second portion to function as a cantilever.

10. The method according to claim 9 further comprising a step (h) of removing part of the upper surface of the base to define a well after said step (c) and before said step (d), and wherein said step (d) includes joining said p-type silicon layer with said base so that said second portion overlaps said well.

11. The method according to claim 9, wherein said steps (a) and (b) are replaced with a step of preparing a silicon substrate having an n-type silicon layer applied to the upper surface of the silicon substrate and a p-type silicon layer applied to the upper surface of said n-type silicon layer.

12. The method according to claim 11, wherein said n-type silicon layer is formed by epitaxial growth on the upper surface of said silicon substrate, and wherein said p-type silicon layer is formed by epitaxial growth on the upper surface of said n-type silicon layer.

13. The method according to claim 9, wherein said sensor is an acceleration sensor.

14. A method for manufacturing a sensor employing a semiconductor, said method comprising the steps of:

(a) applying an n-type silicon layer to an upper surface of a silicon substrate;

(b) applying a p-type silicon layer to the upper surface of said n-type silicon layer;

(c) removing part of said p-type silicon layer by electrochemical etching so that said p-type silicon layer is separated into a first p-type portion and a second p-type portion located away from the first p-type portion and so that said n-type silicon layer has a first n-type portion on which said first p-type portion is arranged and a second n-type silicon layer extending integrally from said first n-type portion, wherein said n-type portion has a proximal end and a distal end on which the first p-type portion is arranged;

(d) removing part of an upper surface of a base to define a well;

(e) joining said first and second p-type portions with said base so that part of said second p-type portion overlaps said well;

(f) removing said silicon substrate to expose the upper surface of said n-type silicon layer;

(g) forming a strain gage in said upper surface of the n-type silicon layer at the proximal end of said second n-type portion; and

(h) cutting said base and part of said second n-type portion and said second p-type second portion to disengage the joined state of said base and said second p-type portion thus allowing part of the remaining second n-type portion to function as a cantilever and part of the remaining second p-type portion to function as an inertial mass.

15. The method according to claim 14, wherein said steps (a) and (b) are replaced with a step of preparing a silicon substrate having an n-type silicon layer applied to the upper surface of the silicon substrate and a p-type silicon layer applied to the upper surface of said n-type silicon layer.

16. The method according to claim 15, wherein said n-type silicon layer is formed by epitaxial growth on the upper surface of said silicon substrate, and wherein said p-type silicon layer is formed by epitaxial growth on the upper surface of said n-type silicon layer.

17. The method according to claim 14, wherein said sensor is an acceleration sensor.