Pre-bond cavity air bridge

• US 5,949,144 A
• Filed: 05/20/1996
• Issued: 09/07/1999
• Est. Priority Date: 05/20/1996
• Status: Expired due to Term

• Current Assignee: Intersil Americas LLC (Renesas Electronics Corporation)
• Original Assignee: Harris Corporation (L3Harris Technologies, Inc.)
• Inventors: Gaul, Stephen Joseph, Delgado, Jose Avelino
• Primary Examiner(s): WILLIAMS, ALEXANDER O
• Application Number:
  US08/650,762
• Time in Patent Office: 1,205 Days
• Field of Search: 257/776, 257/758, 257/522, 257/763, 257/276, 257/756, 257/773, 257/680, 257/226, 257/672, 257/277, 438/624, 438/669, 438/619
• US Class Current: 257/776
• CPC Class Codes: H01L 21/2007 Bonding of semiconductor wafers to insulating substrates or to semiconducting substrates using an intermediate insulating layer H01L21/2011 takes precedence; bonding of semiconductor wafers to semiconductor wafers for junction formation H01L21/187
• CPC Class Codes: H01L 21/76264 SOI together with lateral isolation, e.g. using local oxidation of silicon, or dielectric or polycristalline material refilled trench or air gap isolation regions, e.g. completely isolated semiconductor islands
• CPC Class Codes: H01L 21/76275 Vertical isolation by bonding techniques
• CPC Class Codes: H01L 21/76289 Lateral isolation by air gap
• CPC Class Codes: H01L 23/4821 Bridge structure with air gap
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Abstract

A handle wafer has a cavity coated with a dielectric. A device wafer is bonded to the handle wafer. Metal lines, devices or circuits fabricated on device layer overlay the cavity in the handle wafer thus reducing parasitic capacitances to the handle wafer and crosstalk through the handle wafer. This constitutes a rugged air bridge structure capable of being passivated and/or being placed in plastic packages.

Claims

1. A method for forming an air bridge in a bonded wafer comprising the steps of

forming a cavity having a surface in a handle wafer;

covering the surface of the cavity with a dielectric layer;

covering substantially all of a lower surface of a device wafer with an insulating layer to form an enclosed and dielectrically lined cavity;

bonding the insulating layer on the lower surface of a device wafer to the handle wafer;

covering an upper surface of the device layer with a first metal layer lying over the cavity of the handle wafer; and

forming the first metal layer on the upper surface of the device wafer into a metal lead over the cavity of the handle wafer.

2. The method of claim 1 comprising the further step of

oxide bonding the device wafer to the handle wafer.

3. The method of claim 1 comprising the further step of

opening a trench in the device wafer around the cavity in the handle wafer;

depositing a dielectric on the surface of the trench;

filling the trench.

4. The method of claim 1 comprising the further step of

depositing an interlevel metal dielectric layer over the first metal layer;

opening contact vias through the interlevel metal dielectric layer;

depositing a second metal layer over the interlevel metal dielectric layer;

forming portions of the second metal layer into contacts to the first metal layer through vias in the interlevel metal dielectric.

7. The method of claim 1 wherein the lower surface of the device wafer is substantially free from devices.

5. An air bridge on a bonded wafer comprising:

a handle wafer with an air bridge cavity having a surface in a surface of the handle wafer;

a device wafer with a lower surface substantially entirely covered with an insulating layer, bonded to the handle wafer and covering the air bridge cavity;

a metal lead on an upper surface of the device wafer; and

a dielectric layer coating the surface of the air bridge cavity whereby the air bridge cavity is enclosed with a dielectric surface.

6. The air bridge structure of claim 5 further comprising:

an isolation trench having a surface in the device wafer and surrounding the air bridge cavity; and

a dielectric coating on the surface of the trench.

8. The air bridge bonded wafer structure of claim 5 wherein the lower surface of the device wafer is substantially free from devices.