Select line driver for a display matrix with toggling backplane
First Claim
1. A display apparatus for applying brightness signals to pixels arranged in a plurality of rows and in a plurality of columns of an array, comprising:
- a plurality of column drivers for developing said brightness signals at pixel electrodes of pixels of a given row when said given row is selected;
a source of a toggling, first signal developed in common electrodes of said pixels having, alternately, first and second levels with respect to a predetermined level of a given brightness signal;
a plurality of stages forming a row select scanner, a given one of said stages that is associated with said given row, including;
a first transistor for generating a row line select signal in a corresponding row line to select said given row, during a given row select interval; and
a second transistor coupled to said row line for developing a voltage in a capacitance associated with said row line, in accordance with said first signal, said capacitance capacitively coupling said first signal to said row line to develop a toggling row line de-select signal at said row line that is level shifted with respect to said first signal in accordance with said capacitance voltage, during a row de-select interval.
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Accused Products
Abstract
When a given row in an array of a liquid crystal display having a toggling backplane voltage is de-selected, the row select line voltage also toggles to prevent capacitive current in the pixel capacitance. The row select line driver includes a pair of transistors coupled in a push-pull configuration. The pair of transistors are responsive to a control signal that is produced in a corresponding stage of cascaded stages of a shift register. The pair of transistors form a buffer stage that prevents the toggling voltage developed in the row select line when the row is de-selected from affecting the operation of the shift register.
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Citations
14 Claims
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1. A display apparatus for applying brightness signals to pixels arranged in a plurality of rows and in a plurality of columns of an array, comprising:
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a plurality of column drivers for developing said brightness signals at pixel electrodes of pixels of a given row when said given row is selected; a source of a toggling, first signal developed in common electrodes of said pixels having, alternately, first and second levels with respect to a predetermined level of a given brightness signal; a plurality of stages forming a row select scanner, a given one of said stages that is associated with said given row, including; a first transistor for generating a row line select signal in a corresponding row line to select said given row, during a given row select interval; and a second transistor coupled to said row line for developing a voltage in a capacitance associated with said row line, in accordance with said first signal, said capacitance capacitively coupling said first signal to said row line to develop a toggling row line de-select signal at said row line that is level shifted with respect to said first signal in accordance with said capacitance voltage, during a row de-select interval. - View Dependent Claims (2, 3, 4, 5)
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6. A row select line scanner for an array of a display apparatus, comprising:
a plurality of cascaded stages, a given one of said cascaded stages, including; an input section responsive to an output pulse signal developed at an output of a second stage of said cascaded stages for generating a control signal of said given stage; a first transistor responsive to said control signal for generating an output pulse signal of said given stage that is coupled to an input section of a third stage of said cascaded stages, said output pulse signal being time shifted with respect to said output pulse of said second stage to provide for a shift register operation; and a switching network responsive to said control signal for generating in a given row line, during a row select interval, a row line select signal that is time shifted with respect to said output pulse of said second stage, and for generating in said given row line a toggling, row line de-select signal, during a row de-select interval, that is buffered and decoupled from said input section of said third stage. - View Dependent Claims (7, 8, 9, 10, 11, 12, 13)
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14. A shift register for a row select scanner of a matrix display, comprising:
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a source of a plurality of phase shifted clock signals; a plurality of cascaded stages, a given one of said cascaded stages, including; an input section responsive to an output pulse signal developed at an output of a second stage of said cascaded stages for generating a control signal; a first transistor responsive to said control signal for generating an output pulse signal of said given stage that is coupled to an input section of a third stage, said control signal conditioning said first transistor to generate said output pulse signal of said given stage when a clock signal is developed at a main current conducting terminal of said first transistor such that said output pulse signal of said given stage is time-shifted with respect to said output signal of said second stage; a second transistor responsive to said control signal for generating a row line select signal in a corresponding row line, said control signal conditioning said second transistor to generate said row line select signal when a clock signal is developed at a main current conducting terminal of said second transistor such that said row line select signal is time-shifted with respect to said output signal of said second stage; and a third transistor coupled to said row line for generating in said row line a row de-select signal at a first level, during a first row de-select interval, and at a second level, during a second row de-select interval.
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Specification