Flexible pin location integrated circuit package

• US 5,952,611 A
• Filed: 12/19/1997
• Issued: 09/14/1999
• Est. Priority Date: 12/19/1997
• Status: Expired due to Term

• Current Assignee: Texas Instruments, Inc.
• Original Assignee: Texas Instruments, Inc.
• Inventors: Low, Siu Waf, Eng, Kian Teng, Chan, Min Yu, Goh, Jing Sua
• Primary Examiner(s): Kincaid, Kristine
• Assistant Examiner(s): Ngo, Hung V
• Application Number:
  US08/994,723
• Time in Patent Office: 634 Days
• Field of Search: 174/52.4, 174/52.2, 257/691, 257/692, 257/693, 257/587, 257/582, 257/730, 257/738, 361/775
• US Class Current: 174/534
• CPC Class Codes: H01L 2224/04042 Bonding areas specifically adapted for wire connectors, e.g. wirebond pads
• CPC Class Codes: H01L 2224/05553 being rectangular
• CPC Class Codes: H01L 2224/05554 being square
• CPC Class Codes: H01L 2224/05599 Material
• CPC Class Codes: H01L 2224/06136 Covering only the central area of the surface to be connected, i.e. central arrangements
• CPC Class Codes: H01L 2224/32225 the item being non-metallic, e.g. insulating substrate with or without metallisation
• CPC Class Codes: H01L 2224/45015 being circular
• CPC Class Codes: H01L 2224/45144 Gold (Au) as principal constituent
• CPC Class Codes: H01L 2224/48091 Arched
• CPC Class Codes: H01L 2224/48233 connecting the wire to a potential ring of the item
• CPC Class Codes: H01L 2224/4824 Connecting between the body and an opposite side of the item with respect to the body
• CPC Class Codes: H01L 2224/48599 Principal constituent of the connecting portion of the wire connector being Gold (Au)
• CPC Class Codes: H01L 2224/49109 outside the semiconductor or solid-state body
• CPC Class Codes: H01L 2224/73215 Layer and wire connectors
• CPC Class Codes: H01L 2224/83 using a layer connector
• CPC Class Codes: H01L 2224/85 using a wire connector
• CPC Class Codes: H01L 2224/85399 Material
• CPC Class Codes: H01L 2224/97 the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
• CPC Class Codes: H01L 23/13 characterised by the shape
• CPC Class Codes: H01L 23/49816 Spherical bumps on the substrate for external connection, e.g. ball grid arrays [BGA]
• CPC Class Codes: H01L 23/50 : for integrated circuit devices, e.g. power bus, number of leadsH01L23/482 - H01L23/498 take precedence
• CPC Class Codes: H01L 24/06 : of a plurality of bonding areas
• CPC Class Codes: H01L 24/45 : of an individual wire connector
• CPC Class Codes: H01L 24/48 : of an individual wire connector
• CPC Class Codes: H01L 24/49 : of a plurality of wire connectors
• CPC Class Codes: H01L 24/97 : the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
• CPC Class Codes: H01L 2924/00 : Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00014 : the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/01006 : Carbon [C]
• CPC Class Codes: H01L 2924/01014 : Silicon [Si]
• CPC Class Codes: H01L 2924/01023 : Vanadium [V]
• CPC Class Codes: H01L 2924/01027 : Cobalt [Co]
• CPC Class Codes: H01L 2924/01045 : Rhodium [Rh]
• CPC Class Codes: H01L 2924/01047 : Silver [Ag]
• CPC Class Codes: H01L 2924/0105 : Tin [Sn]
• CPC Class Codes: H01L 2924/01079 : Gold [Au]
• CPC Class Codes: H01L 2924/014 : Solder alloys
• CPC Class Codes: H01L 2924/10253 : Silicon [Si]
• CPC Class Codes: H01L 2924/12041 : LED
• CPC Class Codes: H01L 2924/14 : Integrated circuits
• CPC Class Codes: H01L 2924/351 : Thermal stress

Abstract

An integrated circuit package (30) including a substrate (70) having an opening (86) and first and second surfaces(92, 94), a plurality of pads (100) disposed on the first and second surfaces (92, 94) having disposed thereon solder balls (150) electrically connected by a via (84) that provides the end-user with flexibility in the location of a power supply Pin (96) is disclosed.

Claims

1. An integrated circuit package operably positionable in more than one orientation comprising:

a substrate having an opening and first and second surfaces;

at least one bus bar being integral with said substrate and extending into said opening;

a power terminal having first and second ends, said first end disposed on said first surface, said second end disposed on said second surface, said first and second ends being electrically connected with said at least one bus bar;

a plurality of routing strips being integral with said substrate and extending into said opening;

a plurality of pads disposed on said first and second surfaces, at least one of said pads disposed on said first surface being electrically connected with at least one of said routing strips and at least one of said pads disposed on said second surface being electrically connected with at least one of said routing strips;

a chip adhered to said substrate, said chip having at least one bonding pad;

wire bonding electrically connecting said at least one bonding pad to at least one of said routing strips; and

potting material filling said opening.

2. The integrated circuit package as recited in claim 1 wherein said power terminal further includes a via extending between said first and second ends.

3. The integrated circuit package as recited in claim 1 further including wire bonding electrically connecting said at least one bus bar to at said least one bonding pad.

4. The integrated circuit package as recited in claim 1 further including at least one solder ball located on said first end of said power terminal.

5. The integrated circuit package as recited in claim 1 further including at least one solder ball located on said second end of said power terminal.

6. The integrated circuit package as recited in claim 1 further including at least one solder ball located on said first end of said power terminal and at least one solder ball located on said second end of said power terminal.

7. The integrated circuit package as recited in claim 1 further including at least one via extending between at least one of said pads disposed on said first surface and at least one of said pads disposed on said second surface.

8. The integrated circuit package as recited in claim 1 wherein said substrate further includes a cavity and wherein said chip is adhered to said substrate in said cavity.

9. An integrated circuit package operably positionable in more than one orientation with respect to a power source, the integrated circuit package comprising:

a substrate having an opening and first and second surfaces;

at least one bus bar being integral with said substrate and extending into said opening;

a power terminal having first and second ends, said first end disposed on said first surface, said second end disposed on said second surface, said first and second ends being electrically connected with said at least one bus bar;

a via extending between said first and second ends;

a plurality of routing strips being integral with said substrate and extending into said opening;

a plurality of pads disposed on said first and second surfaces, at least one of said pads disposed on said first surface being electrically connected with at least one of said routing strips and at least one of said pads disposed on said second surface being electrically connected with at least one of said routing strips;

a chip adhered to said substrate, said chip having at least one bonding pad;

first wire bonding electrically connecting said at least one bonding pad to at least one of said routing strips;

second wire bonding electrically connecting said at least one bonding pad to said at least one bus bar; and

potting material filling said opening.

10. The integrated circuit package as recited in claim 9 further including at least one solder ball located on said first end of said power terminal.

11. The integrated circuit package as recited in claim 9 further including at least one solder ball located on said second end of said power terminal.

12. The integrated circuit package as recited in claim 9 further including at least one solder ball located on said first end of said power terminal and at least one solder ball located on said second end of said power terminal.

13. The integrated circuit package as recited in claim 9 further including at least one via extending between at least one of said pads disposed on said first surface and at least one of said pads disposed on said second surface.

14. The integrated circuit package as recited in claim 9 wherein said substrate further includes a cavity and wherein said chip is adhered to said substrate in said cavity.

15. An integrated circuit package operably positionable in more than one orientation produced by a process comprising the steps of:

obtaining a substrate having an opening and first and second surfaces;

extending at least one bus bar within said substrate into said opening;

disposing a power terminal having first and second ends in said substrate, said first end disposed on said first surface, said second end disposed on said second surface, said first and second ends being electrically connected with said at least one bus bar;

extending a plurality of routing strips within said substrate into said opening;

disposing a plurality of pads on said first and second surfaces;

electrically connecting at least one of said pads with at least one of said routing strips;

electrically connecting at least one of said pads disposed on said first surface with at least one of said pads disposed on said second surface with at least one via;

adhering a chip to said substrate, said chip having at least one bonding pad;

electrically connecting said at least one bonding pad to at least one of said routing strips with wire bonding; and

filling said opening with a potting material.

16. The process as recited in claim 15 further including extending a via between said first and second ends of said power terminal.

17. The process as recited in claim 15 further comprising the step of attaching at least one solder ball to said first end.

18. The process as recited in claim 15 further comprising the step of attaching at least one solder ball to said second end.

19. The process as recited in claim 15 further comprising the step of attaching at least one solder ball to said first end and attaching at least one solder ball to said second end.