Apparatus for testing semiconductor wafers
First Claim
1. An apparatus for testing a semiconductor wafer comprising:
- a base;
a cover attachable to the base;
an interconnect on the base comprising a substrate and a contact member on the substrate configured to electrically contact a contact location on the wafer; and
a force applying member for biasing the wafer against the interconnect, the force applying member comprising a first spring member between the cover and the wafer, and a second spring member between the interconnect and the base.
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Accused Products
Abstract
A method, apparatus and system for testing semiconductor wafers are provided. The method includes providing a wafer carrier to provide an electrical path for receiving and transmitting test signals to the wafer. The wafer carrier includes a base for retaining the wafer, and an interconnect having contact members configured to establish electrical communication with contact locations on the wafer. The wafer carrier can include one or more compressible spring members configured to bias the wafer and interconnect together in the assembled carrier. The wafer carrier can be assembled, with the wafer in alignment with the interconnect, using optical alignment techniques, and an assembly tool similar to aligner bonder tools used for flip chip bonding semiconductor dice. A system for use with the carrier can include a testing apparatus configured to apply test signals through the carrier to the wafer while the wafer is subjected to temperature cycling.
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Citations
21 Claims
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1. An apparatus for testing a semiconductor wafer comprising:
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a base; a cover attachable to the base; an interconnect on the base comprising a substrate and a contact member on the substrate configured to electrically contact a contact location on the wafer; and a force applying member for biasing the wafer against the interconnect, the force applying member comprising a first spring member between the cover and the wafer, and a second spring member between the interconnect and the base. - View Dependent Claims (2, 3, 4, 5, 6)
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7. An apparatus for testing a semiconductor wafer comprising:
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a base; an interconnect on the base comprising a substrate and a contact member on the substrate for establishing electrical communication with a contact location on the wafer; a cover attachable to the base; a first compressible spring member placed between the cover and the wafer; and a second compressible spring member placed between the interconnect and the base. - View Dependent Claims (8, 9, 10, 11, 12)
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13. An apparatus for testing a semiconductor wafer comprising:
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a base comprising a conductor and an electrical connector; a cover attachable to the base; an interconnect mounted between the base and the cover comprising a substrate and a contact member on the substrate configured to electrically contact a contact location on the wafer; an electrical path formed between the contact member on the interconnect and the conductor on the base; a first compressible spring member placed between the cover and the wafer to press the wafer against the interconnect; and a second compressible spring member placed between the interconnect and the base to press the interconnect against the wafer. - View Dependent Claims (14, 15, 16, 17)
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18. An apparatus for testing a semiconductor wafer comprising:
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a base; a cover attachable to the base; an interconnect between the base and the cover comprising a contact member configured to electrically contact a contact location on the wafer; a first elastomeric spring member between the cover and the wafer; and a second elastomeric spring member between the base and the interconnect. - View Dependent Claims (19, 20)
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21. The apparatus of claim 23 further comprising an impedance matched tape electrically connecting the contact member to a connector on the base.
Specification