Flexible and programmable delta-sigma analog signal converter

• US 5,952,947 A
• Filed: 09/09/1997
• Issued: 09/14/1999
• Est. Priority Date: 09/09/1997
• Status: Expired due to Term

• Current Assignee: Hughes Electronics Corporation (Rtx Corporation)
• Original Assignee: Raytheon Company (Rtx Corporation)
• Inventors: Posey, William P., Jensen, Joseph J., Nussbaum, Howard S., Raghavan, Gopal
• Primary Examiner(s): Williams, Howard L.
• Application Number:
  US08/925,954
• Time in Patent Office: 735 Days
• Field of Search: 341/143
• US Class Current: 341/143
• CPC Class Codes: H03M 3/392 Arrangements for selecting among plural operation modes, e.g. for multi-standard operation
• CPC Class Codes: H03M 3/40 Arrangements for handling quadrature signals, e.g. complex modulators
• CPC Class Codes: H03M 3/41 combined with modulation to or demodulation from the carrier
• CPC Class Codes: H03M 3/458 Analogue/digital converters using delta-sigma modulation as an intermediate step

Abstract

Processing apparatus is provided that directly samples and quantizes a complex envelope of a bandlimited waveform centered at a predetermined carrier frequency. An oversampling delta-sigma modulator 1 samples and quantizes the input signal to a single bit data stream. A serial-to-parallel converter converts the single bit data stream into a parallel bit stream. A digital decimation filter digitally filters the parallel bit stream to produce an estimate of the baseband in-phase and quadrature components of the input signal. In-phase and quadrature video filters generate in-phase and quadrature samples that are output from the analog signal converter. A controller 26 and a plurality of digital-to-analog converters 25 are used to center noise shaping nulls of the delta-sigma modulator around the carrier frequency. The controller sets the spacing between nulls of the serial-to-parallel converter to maximize the signal-to-noise ratio of the analog signal. The controller controls the decimation filter to set the sample times of thereof to sample the carrier in quadrature so that the coefficients are programmed to form a bandpass filter at the carrier frequency and programs the coefficients of the video filters to form bandpass filters at the decimated carrier frequency.

Claims

1. A programmable delta-sigma analog signal converter comprising:

an oversampling delta-sigma modulator for sampling and quantizing an input signal comprising a bandlimited signal at a carrier frequency to a single bit;

a serial-to-parallel converter coupled to the delta-sigma modulator;

a digital decimation filter for digitally filtering the signal output of the delta-sigma modulator to produce an estimate of the baseband in-phase and quadrature components of the input signal;

in-phase and quadrature video filters for processing the output of the decimation filter to generate in-phase and quadrature samples that are output from the analog signal converter; and

a plurality of digital-to-analog converters coupled to the delta-sigma modulator; and

a controller coupled to the plurality of digital-to-analog converters for centering noise shaping nulls of the delta-sigma modulator around the carrier frequency, for setting the spacing between noise shaping nulls to maximize the signal-to-noise ratio of the digital output of the analog signal converter, and coupled to the decimation filter to set the sample times of the filter to sample the carrier in quadrature and coupled to the decimation filter for programming the coefficients thereof to form a bandpass filter at the carrier frequency and coupled to the in-phase and quadrature video filters for programming the coefficients thereof to form bandpass filters at the decimated carrier frequency.

2. The analog signal converter of claim 1 wherein the coefficients of the decimation filter are selected to minimize the aliased quantization noise of the delta-sigma modulator.

3. The analog signal converter of claim 1 wherein coefficients of the in-phase and quadrature video filters video filters are selected to provide a desired in-band response, control the image of the in-phase and quadrature approximation, and suppress quantization noise.

4. The analog signal converter of claim 1 wherein the serial-to-parallel converter and decimation filter comprise:

an N bit shift register for receiving the single bit serial output stream of the delta-sigma modulator and for converting it to an N bit parallel word;

a lookup table that is addressed by the N bit parallel word; and

an adder for adding outputs of the addressed lookup table to generate the estimate of the baseband in-phase and quadrature components that are output to the in-phase and quadrature video filters.

5. The analog signal converter of claim 4 wherein the lookup table comprises a plurality of lookup tables that individually output a plurality of partial sums.

6. The analog signal converter of claim 1 wherein the in-phase and quadrature video filters each comprise:

in-phase real, in-phase imaginary, quadrature real and quadrature imaginary multiplier-accumulator banks that each comprise a plurality of processing channels that include a multiplier, a coefficient memory coupled to the multiplier, an adder coupled to an output of the multiplier, and a delay element coupled to an output of the adder, and a switch that is selectively couples the output of the delay element of a preceding processing channel and the output of the adder of that processing channel;

a first adder coupled to the in-phase real and the quadrature imaginary multiplier-accumulator banks for outputting the in-phase digital video signal; and

a second adder coupled to the quadrature real and the in-phase imaginary multiplier-accumulator banks for outputting the quadrature digital video signal.

7. The analog signal converter of claim 1 wherein the controller provides interphase control comprising filter coefficients and a decimation ratio that are held constant, and intraphase control comprising a set of parameters that can change for each pulse repetition interval.

8. The analog signal converter of claim 1 wherein the intraphase control parameters include the number of samples retained, the number of samples not retained, and the fine sample adjustment.