Active matrix circuit

• US 5,952,989 A
• Filed: 04/14/1997
• Issued: 09/14/1999
• Est. Priority Date: 04/16/1996
• Status: Expired due to Term

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: Koyama, Jun
• Primary Examiner(s): Powell, Mark R.
• Assistant Examiner(s): Kovalick, Vincent E.
• Application Number:
  US08/834,331
• Time in Patent Office: 883 Days
• Field of Search: 345/90, 345/92, 345/93, 345/98, 345/100, 349/42, 349/43, 349/44, 349/110, 349/111
• US Class Current: 345/92
• CPC Class Codes: G09G 2300/0814 used for selection purposes, e.g. logical AND for partial update
• CPC Class Codes: G09G 3/3659 the addressing of the pixel involving the control of two or more scan electrodes or two or more data electrodes, e.g. pixel voltage dependant on signal of two data electrodes

Abstract

In an active matrix circuit, a series connection of a plurality of transistors as a switching element is provided for each pixel electrode. The transistors are controlled by different gate signal lines.

Claims

1. An active matrix circuit comprising:

pixel electrodes arranged in matrix form on a substrate;

selection signal lines;

data signal lines arranged so as to cross the selection signal lines;

switching elements connected to the respective pixel electrodes and the corresponding data signal lines, the switching elements comprising;

a first switching element controlled by a first selection signal line and a second selection signal line adjacent to the first selection signal line; and

a second switching element provided adjacent to the first switching element and connected to the same data signal line as the first switching element, the second switching element being controlled by the second selection signal line and a third selection signal line adjacent to the second selection signal lines,

wherein in the first switching element the first selection signal line traverses a semiconductor coating, and in the second switching element the second selection signal line traverses the semiconductor coating at least twice.

2. An active matrix circuit according to claim 1, further comprising a conductive light-shielding layer covering the data signal lines and the selection signal lines, the light-shielding layer being kept at a constant potential, wherein the pixel electrodes and the light-shielding layer constitute capacitors.

3. An active matrix circuit according to claim 1, wherein each of the first and second switching elements is a series connection of a plurality of transistors, and wherein a capacitor is formed by an intermediate portion of the transistors constituting the first switching element and the second selection signal line.

4. An active matrix circuit according to claim 1, wherein pulses applied to the first and second selection signal lines overlap in time with each other, and pulses applied to the second and third selection signal lines overlap in time with each other.

5. An active matrix circuit according to claim 1, wherein each pixel has an aspect ratio a:

b and a is larger than b.

6. An active matrix circuit comprising:

pixel electrodes arranged in matrix form on a substrate;

selection signal lines;

data signal lines arranged so as to cross the selection signal lines;

switching elements connected to the respective pixel electrodes and the corresponding data signal lines, the switching elements comprising;

a first switching element controlled by a first selection signal line and a second selection signal line adjacent to the first selection signal line; and

a second switching element provided adjacent to the first switching element and connected to the same data signal line as the first switching element, the second switching element being controlled by a third selection signal line and a fourth selection signal line adjacent to the third selection signal line,

wherein the second and third selection signal lines are supplied with the same signal.

7. An active matrix circuit according to claim 6, further comprising a conductive light-shielding layer covering the data signal lines and the selection signal lines, the light-shielding layer being kept at a constant potential, wherein the pixel electrodes and the light-shielding layer constitute capacitors.

8. An active matrix circuit according to claim 6, wherein each of the first and second switching elements is a series connection of a plurality of transistors, and wherein a capacitor is formed by an intermediate portion of the transistors constituting the first switching element and the second selection signal line.

9. An active matrix circuit according to claim 6, wherein pulses applied to the first and second selection signal lines overlap in time with each other, and pulses applied to the third and fourth selection signal lines overlap in time with each other.

10. An active matrix circuit according to claim 6, wherein each pixel has an aspect ratio a:

b and a is smaller than b.

11. An active matrix circuit according to claim 6 wherein the second and third selection signal lines are electrically connected with each other.