Controlling currents in parallel AC/DC converters

• US 5,956,244 A
• Filed: 03/05/1998
• Issued: 09/21/1999
• Est. Priority Date: 03/05/1998
• Status: Expired due to Term

• Current Assignee: Allen-Bradley Company (Rockwell Automation, Inc.)
• Original Assignee: Allen-Bradley Company LLC (Rockwell Automation, Inc.)
• Inventors: Martin, Timothy J., Pitsch, Robert L., Rehm, Thomas J., Buchholz, Brian R.
• Primary Examiner(s): STERRETT, JEFFREY L
• Application Number:
  US09/035,718
• Time in Patent Office: 565 Days
• Field of Search: 363/44, 363/67, 363/69, 363/70, 363/84, 363/87, 363/88, 363/89, 363/127, 363/129
• US Class Current: 363/70
• CPC Class Codes: H02M 7/17 arranged for operation in parallel

Abstract

An apparatus for converting three phase AC supply line voltages to DC voltage on a DC bus, the apparatus including a master converter subsystem and at least one slave converter subsystem wherein each subsystem includes a current regulator, a PMW modulator and a converter, the master converter linked to the supply lines and the slave converter linked to the supply lines via intermediate lines, each regulator receiving a current command signal and generating modulating signals, each modulator using a carrier signal and modulating signals from a corresponding regulator to generate control signals to control a corresponding converter, the intermediate lines linked to a common mode choke for essentially eliminating common mode currents in the intermediate lines.

Claims

1. An apparatus for converting AC voltage on first, second and third supply lines to DC voltage between positive and negative DC buses, the apparatus comprising:

a voltage regulator providing a current command signal;

a carrier generator for generating a carrier signal;

a master converter subsystem including a master current regulator, a master PWM modulator and a master converter, the master converter including six switches arranged to form master first, second and third series switch pairs between the positive and negative DC buses, a first input node between the first master pair linked to the first supply line, a second input node between the second master pair linked to the second supply line and a third input node between the third master pair linked to the third supply line, the master regulator using the current command signal to generate master modulating signals, the master PWM modulator using the master modulating signals and the carrier signal to generate control signals for controlling the master converter switches;

a slave converter subsystem including a slave current regulator, a slave PWM modulator and a slave converter, the slave converter including six switches arranged to form slave first, second and third series switch pairs between the positive and negative DC buses, a fourth input node between the first slave pair linked to the first supply line via a first intermediate line, a fifth input node between the second slave pair linked to the second supply line via a second intermediate line and a sixth input node between the third slave pair linked to the third supply line via a third intermediate line, the slave regulator using the current command signal to generate slave modulating signals, the slave PWM modulator using the slave modulating signals and the carrier signal to generate control signals for controlling the slave converter switches; and

a common mode choke linked to the first, second and third intermediate lines to essentially eliminate common mode currents in the first, second and third intermediate lines.

2. The apparatus of claim 1 wherein a second common mode choke is linked between the first, second, and third supply lines and the master converter to essentially eliminate common mode currents in the first, second, and third supply lines.

3. The apparatus of claim 1 wherein the slave converter subsystem is a first slave subsystem, the common mode choke is a first common mode choke and the apparatus further includes N additional slave subsystems and N additional common mode chokes where N is at least one, each additional slave subsystem including an additional slave current regulator, an additional slave PWM modulator and an additional slave converter, each additional slave converter including six switches arranged to form additional slave first, second and third series switch pairs between the positive and negative DC buses, a seventh input node between each additional first slave pair linked to the first supply line via an additional first intermediate line, an eighth input node between the additional second slave pair linked to the second supply line via an additional second intermediate line and a ninth input node between the additional third slave pair linked to the third supply line via an additional third intermediate line, each additional slave regulator using the current command signal to generate additional slave modulating signals, each additional slave PWM modulator using corresponding additional slave modulating signals and the carrier signal to generate control signals for controlling corresponding additional slave converter switches, each additional common mode choke linked to corresponding additional first, second and third intermediate lines to essentially eliminate common mode currents in the corresponding additional first, second and third intermediate lines.

4. The apparatus of claim 3 wherein N is one.

5. The apparatus of claim 1 further including a bus voltage sensor for sensing DC voltage across the positive and negative DC buses and providing a DC voltage feedback signal, the voltage regulator receiving the DC voltage feedback signal and a DC voltage command signal and comparing the received signals to provide the current command signal.

6. The apparatus of claim 5 further including at least first and second master current sensors linked to the first and second supply lines for providing master current feedback signals to the master regulator and further including at least first and second slave current sensors linked to the first and second intermediate lines for providing slave current feedback signals to the slave regulator.

7. The apparatus of claim 1 further including at least one capacitor across the positive and negative DC buses.

8. A method for converting AC voltage on first, second and third supply lines to DC voltage between positive and negative DC rails, the method for use with an apparatus including a master converter subsystem and at least one slave converter subsystem wherein each subsystem includes a current regulator, a PWM modulator and a converter, each regulator using a current command signal to generate modulating signals for controlling an associated modulator, each modulator using a carrier signal and corresponding modulating signals to generate control signals for controlling a corresponding converter, the master converter linked to each of the supply lines and the slave converter linked to the first, second and third supply lines via first, second and third intermediate lines, respectively, the method comprising the steps of:

providing the same current command signal to each of the master and slave current regulators;

providing the same carrier signal to each of the master and slave modulators; and

essentially eliminating common mode currents on the first, second and third intermediate lines.

9. The method of claim 8 further including the steps of sensing the DC voltage across the positive and negative DC buses to provide a DC voltage feedback signal, receiving a DC voltage command signal and comparing the DC feedback and command signals to generate the current command signal.