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Semiconductor memory

  • US 5,956,287 A
  • Filed: 10/29/1997
  • Issued: 09/21/1999
  • Est. Priority Date: 11/01/1996
  • Status: Expired due to Fees
First Claim
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1. A semiconductor memory comprising:

  • a memory cell array;

    a write address generator generating sequential addresses to be written in the memory cell array;

    a validity register;

    a write buffer writing a validity bit into the validity register;

    a read address generator generating a read address for the memory cell array; and

    a read controller judging validity of read data from the memory cell array in accordance with the validity bit read from the validity register.

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