Spread spectrum communications system

• US 5,956,328 A
• Filed: 12/02/1996
• Issued: 09/21/1999
• Est. Priority Date: 11/30/1995
• Status: Expired due to Fees

• Current Assignee: NEC Corporation
• Original Assignee: NEC Corporation
• Inventors: Sato, Toshifumi
• Primary Examiner(s): Pham, Chi H.
• Assistant Examiner(s): Duong, Frank
• Application Number:
  US08/759,146
• Time in Patent Office: 1,023 Days
• Field of Search: 370/204, 370/320, 370/335, 370/342, 370/441, 370/206, 375/200, 375/206
• US Class Current: 370/335
• CPC Class Codes: H04B 1/707 using direct sequence modulation
• CPC Class Codes: H04J 13/10 Code generation
• CPC Class Codes: H04L 27/18 Phase-modulated carrier systems, i.e. using phase-shift keying H04L27/32 takes precedence

Abstract

In a data transmission system, transmission data is modulated based on π/4-shift QPSK modulation according to two spreading code sequences which are generated according to a chip timing signal in each symbol interval. At a receiving side, the received spread spectrum signal is demodulated based on the same π/4-shift QPSK modulation according to the respective replicas of the spreading code sequences.

Claims

1. A data transmission system comprising a transmitter and a receiver,

the transmitter comprising:

converting means for converting transmission data into parallel data according to a symbol timing signal;

first generating means for generating two spreading code sequences according to a chip timing signal in each symbol interval;

first means for spreading the parallel data such that the parallel data is modulated based on π

/4-shift QPSK (quadrature phase shift keying) scheme according to the spreading code sequences to produce quadrature spread spectrum signals; and

transmitting means for transmitting a transmission signal which is generated based on the quadrature spread spectrum signals to the receiver, and

the receiver comprising;

receiving means for receiving the transmission signal from the transmitter to produce received quadrature spread spectrum signals;

second generating means for generating two despreading code sequences which are replicas of the spreading code sequences, respectively;

second means for despreading the received quadrature spread spectrum signals such that the received quadrature spread spectrum signals are demodulated based on π

/4-shift QPSK scheme according to the despreading code sequences to produce received despread data;

reproduction means for reproducing received data from the received despread data; and

recovery means for recovering a symbol timing signal and a chip timing signal from the received quadrature spread spectrum signals and the received data.

2. The system according to claim 1, wherein the transmitter further comprises:

spectrum shaping means for spectrum-shaping the quadrature spread spectrum signals;

analog converting means for converting the output signals of the spectrum shaping means into analog quadrature baseband signals;

second converting means for converting the analog quadrature baseband signals to a radio transmission signal; and

a transmission power amplifier for amplifying the radio transmission signal in power.

3. The system according to claim 1, wherein the receiver further comprises:

converting means for converting the received quadrature spread spectrum signals into digital quadrature spread spectrum signals according to a recovered chip timing signal.

4. The system according to claim 3, wherein the second means comprises:

third phase shifting means for shifting a phase of the received quadrature spread spectrum signals by one selected from 0 and -π

/4 according to the recovered chip timing signal and a second timing signal of one-half the recovered chip rate synchronous with the recovered chip timing signal, to produce phase-shifted quadrature spread spectrum signals;

fourth phase shifting means for shifting a phase of the phase-shifted quadrature spread spectrum signals based on QPSK scheme at a recovered chip rate of the recovered chip timing signal according to the despreading code sequences to produce quadrature despread data; and

accumulating means for accumulating the quadrature despread data in each symbol interval to produce the received despread data.

5. The system according to claim 4, wherein the fourth phase shifting means shifts a phase of the phase-shifted quadrature spread spectrum signals by one selected from 0, -π

/2 +π

/2 and π

according to a combination of respective chip levels of the despreading code sequences.

6. The system according to claim 1, wherein said system is a mobile code-division multiple access (CDMA) communications system.

7. A data transmission system comprising a transmitter and a receiver,

the transmitter comprising:

converting means for converting transmission data into parallel data according to a symbol timing signal;

first generating means for generating two spreading code sequences according to a chip timing signal in each symbol interval;

first means for spreading the parallel data such that the parallel date is modulated based on π

/4-shift QPSK (quadrature phase shift keying) scheme according to the spreading code sequences to produce quadrature spread spectrum signals; and

transmitting means for transmitting a transmission signal which is generated based on the quadrature spread spectrum signals to the receiver, and

the receiver comprising;

receiving means for receiving the transmission signal from the transmitter to produce received quadrature spread spectrum signals;

second generating means for generating two despreading code sequences which are replicas of the spreading code sequences, respectively;

second means for despreading the received quadrature spread spectrum signals such that the received quadrature spread spectrum signals are demodulated based on π

/4-shift QPSK scheme according to the despreading code sequences to produce received despread data;

reproduction means for reproducing received data from the received despread data; and

recovery means for recovering a symbol timing signal and a chip timing signal from the received quadrature spread spectrum signals and the received data;

wherein the first means comprises;

first phase shifting means for shifting a phase of the parallel data based on QPSK scheme according to the spreading code sequences at a chip rate of the chip timing signal to produce first quadrature spread spectrum signals; and

second phase shifting means for shifting a phase of the first quadrature spread spectrum signals by one selected from 0 and π

/4 according to a first timing signal of one-half the chip rate synchronous with the chip timing signal.

8. The system according to claim 7, wherein the second means comprises:

third phase shifting means for shifting a phase of the received quadrature spread spectrum signals based on QPSK scheme at a recovered chip rate of the recovered chip timing signal according to the despreading code sequences to produce first quadrature despread data; and

fourth phase shifting means for shifting a phase of the first quadrature despread data by one selected from 0 and -π

/4 according to a second timing signal of one-half the recovered chip rate synchronous with the recovered chip timing signal.

9. The system according to claim 8, wherein the third phase shifting means shifts a phase of the received quadrature spread spectrum signals by one selected from 0, -π

/2, +π

/2 and π

according to a combination of respective chip levels of the despreading code sequences.

10. The system according to claim 9, wherein the third phase shifting means comprises:

second switching means for switching between an in-phase signal and a quadrature signal of the received quadrature spread spectrum signals when the respective chip levels of the despreading code sequences are not coincident with each other, to produce a first output in-phase signal and a second output quadrature signal;

third sign inverting means for inverting a sign of the first output in-phase signal when a chip level of an in-phase component of the despreading code sequences is a predetermined logical value; and

fourth sign inverting means for inverting a sign of the second output in-phase signal when a chip level of an quadrature component of the despreading code sequences is the predetermined logical value.

11. The system according to claim 7, wherein the first phase shifting means shifts a phase of the parallel data by one selected from 0, +π

/2, -π

/2 and π

according to a combination of respective chip levels of the spreading code sequences.

12. The system according to claim 11, wherein the first phase shifting means comprises:

first switching means for switching between first data and second data of the parallel data when the respective chip levels are not coincident with each other, to produce first output data and second output data;

first sign inverting means for inverting a sign of the first output data when a chip level of one of the spreading code sequences is a predetermined logical value; and

second sign inverting means for inverting a sign of the second output data when a chip level of the other of the spreading code sequences is the predetermined logical value.

13. A data transmission system comprising a transmitter and a receiver,

the transmitter comprising:

converting means for converting transmission data into parallel data according to a symbol timing signal;

first generating means for generating two spreading code sequences according to a chip timing signal in each symbol interval;

first means for spreading the parallel data such that the parallel date is modulated based on π

/4 shift QPSK (quadrature phase shift keying) scheme according to the spreading code sequences to produce quadrature spread spectrum signals; and

transmitting means for transmitting a transmission signal which is generated based on the quadrature spread spectrum signals to the receiver, and

the receiver comprising;

receiving means for receiving the transmission signal from the transmitter to produce received quadrature spread spectrum signals;

second generating means for generating two despreading code sequences which are replicas of the spreading code sequences, respectively;

second means for despreading the received quadrature spread spectrum signals such that the received quadrature spread spectrum signals are demodulated based on π

/4-shift QPSK scheme according to the despreading code sequences to produce received despread data;

reproduction means for reproducing received data from the received despread data; and

recovery means for recovering a symbol timing signal and a chip timing signal from the received quadrature spread spectrum signals and the received data;

wherein the first means performs spectrum spreading of the parallel data such that the parallel data is mapped on a transmission signal constellation of π

/4-shift QPSK scheme according to respective logical levels of the spreading code sequences and the second timing signal of one-half the recovered chip rate synchronous with the recovered chip timing signal.

14. The system according to claim 13, wherein the first means comprises a memory storing data of possible signal points of the transmission signal constellation, the possible signal points being addressed by a combination of the parallel data, the respective logical levels of the spreading code sequences, and the second timing signal.

15. A data transmission system comprising a transmitter and a receiver,

the transmitter comprising:

converting means for converting transmission data into parallel data according to a symbol timing signal;

first generating means for generating two spreading code sequences according to a chip timing signal in each symbol interval;

first means for spreading the parallel data such that the parallel date is modulated based on π

/4 shift QPSK (quadrature phase shift keying) scheme according to the spreading code sequences to produce quadrature spread spectrum signals; and

transmitting means for transmitting a transmission signal which is generated based on the quadrature spread spectrum signals to the receiver, and

the receiver comprising;

receiving means for receiving the transmission signal from the transmitter to produce received quadrature spread spectrum signals;

second generating means for generating two despreading code sequences which are replicas of the spreading code sequences, respectively;

second means for despreading the received quadrature spread spectrum signals such that the received quadrature spread spectrum signals are demodulated based on π

/4-shift QPSK scheme according to the despreading code sequences to produce received despread data;

reproduction means for reproducing received data from the received despread data; and

recovery means for recovering a symbol timing signal and a chip timing signal from the received quadrature spread spectrum signals and the received data;

wherein the second means comprises;

third phase shifting means for shifting a phase of the received quadrature spread spectrum signals based on QPSK scheme at a recovered chip rate of the recovered chip timing signal according to the despreading code sequences to produce first quadrature despread data; and

fourth phase shifting means for shifting a phase of the first quadrature despread data by one selected from 0 and -π

/4 according to a second timing signal of one-half the recovered chip rate synchronous with the recovered chip timing signal.

16. The system according to claim 15, wherein the fourth phase shifting means comprises:

connection switching means for switching between a first connection and a second connection to transfer the first quadrature despread data to one of the first and second connections according to the second timing signal;

first accumulating means connected to the first connection, for accumulating the first quadrature despread data in each symbol interval to produce first accumulated data;

second accumulating means connected to the second connection, for accumulating the first quadrature despread data in each symbol interval to produce second accumulated data;

fixed phase shifting means for shifting a phase of the second accumulated data by -π

/4 to produce phase-shifted second accumulated data; and

addition means for adding the first accumulated data and the phase-shifted second accumulated data to produce the received despread data.

17. A data transmission system comprising a transmitter and a receiver,

the transmitter comprising:

converting means for converting transmission data into parallel data according to a symbol timing signal;

first generating means for generating two spreading code sequences according to a chip timing signal in each symbol interval;

first means for spreading the parallel data such that the parallel date is modulated based on π

/4 shift QPSK (quadrature phase shift keying) scheme according to the spreading code sequences to produce quadrature spread spectrum signals; and

transmitting means for transmitting a transmission signal which is generated based on the quadrature spread spectrum signals to the receiver, and

the receiver comprising;

receiving means for receiving the transmission signal from the transmitter to produce received quadrature spread spectrum signals;

second generating means for generating two despreading code sequences which are replicas of the spreading code sequences, respectively;

second means for despreading the received quadrature spread spectrum signals such that the received quadrature spread spectrum signals are demodulated based on π

/4-shift QPSK scheme according to the despreading code sequences to produce received despread data;

reproduction means for reproducing received data from the received despread data; and

recovery means for recovering a symbol timing signal and a chip timing signal from the received quadrature spread spectrum signals and the received data;

wherein the second means comprises;

third phase shifting means for shifting a phase of the received quadrature spread spectrum signals by one selected from 0 and -π

/4 according to the recovered chip timing signal and a second timing signal of one-half the recovered chip rate synchronous with the recovered chip timing signal, to produce phase-shifted quadrature spread spectrum signals;

fourth phase shifting means for shifting a phase of the phase-shifted quadrature spread spectrum signals based on QPSK scheme at a recovered chip rate of the recovered chip timing signal according to the despreading code sequences to produce quadrature despread data; and

accumulating means for accumulating the quadrature despread data in each symbol interval to produce the received despread data.

18. The system according to claim 17, wherein the fourth phase shifting means shifts a phase of the phase-shifted quadrature spread spectrum signals by one selected from 0, -π

/2, +π

/2 and π

according to a combination of respective chip levels of the despreading code sequences.

19. A data transmission system comprising a transmitter and a receiver,

the transmitter comprising:

converting means for converting transmission data into parallel data according to a symbol timing signal;

first generating means for generating two spreading code sequences according to a chip timing signal in each symbol interval;

first means for spreading the parallel data such that the parallel date is modulated based on π

/4 shift QPSK (quadrature phase shift keying) scheme according to the spreading code sequences to produce quadrature spread spectrum signals; and

transmitting means for transmitting a transmission signal which is generated based on the quadrature spread spectrum signals to the receiver, and

the receiver comprising;

receiving means for receiving the transmission signal from the transmitter to produce received quadrature spread spectrum signals;

converting means for converting the received quadrature spread spectrum signals into digital quadrature spread spectrum signals according to a recovered chip timing signal;

second generating means for generating two despreading code sequences which are replicas of the spreading code sequences, respectively;

second means for despreading the received quadrature spread spectrum signals such that the received quadrature spread spectrum signals are demodulated based on π

/4-shift QPSK scheme according to the despreading code sequences to produce received despread data;

reproduction means for reproducing received data from the received despread data;

recovery means for recovering a symbol timing signal and a chip timing signal from the received quadrature spread spectrum signals and the received data; and

wherein the second means comprises;

third phase shifting means for shifting a phase of the digital quadrature spread spectrum signals based on QPSK scheme at a recovered chip rate of the recovered chip timing signal according to the despreading code sequences to produce first quadrature despread data; and

fourth phase shifting means for shifting a phase of the first quadrature despread data by one selected from 0 and -π

/4 according to a second timing signal of one-half the recovered chip rate synchronous with the recovered chip timing signal.

20. The receiver according to claim 19, wherein the fourth phase shifting means comprises:

connection switching means for switching between a first connection and a second connection to transfer the first quadrature despread data to one of the first and second connections according to the second timing signal;

first accumulating means connected to the first connection, for accumulating the first quadrature despread data in each symbol interval to produce first accumulated data;

second accumulating means connected to the second connection, for accumulating the first quadrature despread data in each symbol interval to produce second accumulated data;

fixed phase shifting means for shifting a phase of the second accumulated data by -π

/4 to produce phase-shifted second accumulated data; and

addition means for adding the first accumulated data and the phase-shifted second accumulated data to produce the received despread data.

21. The receiver according to claim 20, wherein the fixed phase shifting means, the addition means, and the reproduction means are implemented with a program-controlled processor.

22. A communication apparatus comprising a transmitter and a receiver,

the transmitter comprising:

first converting means for converting transmission data into parallel data according to a symbol timing signal;

first generating means for generating two spreading code sequences according to a chip timing signal in each symbol interval;

first means for spreading the parallel data such that the parallel data is modulated based on π

/4-shift QPSK (quadrature phase shift keying) scheme according to the spreading code sequences to produce quadrature spread spectrum signals;

spectrum shaping means for spectrum-shaping the quadrature spread spectrum signals;

analog converting means for converting the output signals of the spectrum shaping means into analog quadrature baseband signals;

second converting means for converting the analog quadrature baseband signals to a radio transmission; and

a transmission power amplifier for amplifying the radio transmission signal in power, and the receiving comprising;

receiving means for receiving a radio transmission signal to produce received quadrature spread spectrum signals;

converting means for converting the received quadrature spread spectrum signals into digital quadrature spread spectrum signals according to a recovered chip timing signal;

replica generating means for generating two despreading code sequences which are replicas of the spreading code sequences, respectively;

second means for despreading the digital quadrature spread spectrum signals such that the digital quadrature spread spectrum signals are demodulated based on π

/4-shift QPSK scheme according to the despreading code sequences to produce received despread data;

reproduction means for reproducing received data from the received despread data; and

recovery means for generating a recovered symbol timing signal and the recovered chip timing signal from the digital quadrature spread spectrum signals and the received data.

23. The communication apparatus according to claim 22 in a mobile communication terminal.

24. The communication apparatus according to claim 22 in a base station.

25. A method for transmitting data from a transmitter to a receiver, comprising the steps of:

at the transmitter,

converting transmission data into parallel data according to a symbol timing signal;

generating two spreading code sequences according to a chip timing signal in each symbol interval;

spreading the parallel data such that the parallel data is modulated based on π

/4-shift QPSK (quadrature phase shift keying) scheme according to the spreading code sequences to produce quadrature spread spectrum signals; and

transmitting a transmission signal which is generated based on the quadrature spread spectrum signals to the receiver, and

at the receiver,

receiving the transmission signal from the transmitter to produce received quadrature spread spectrum signals;

generating two despreading code sequences which are replicas of the spreading code sequences, respectively;

despreading the received quadrature spread spectrum signals such that the received quadrature spread spectrum signals are demodulated based on π

/4-shift QPSK scheme according to the despreading code sequences to produce received despread data;

reproducing received data from the received despread data; and

recovering a symbol timing signal and a chip timing signal from the received quadrature spread spectrum signals and the received data.

26. The method according to claim 25, wherein the step of spreading the parallel data comprises the steps of:

a first phase shifting step of shifting a phase of the parallel data based on QPSK scheme according to the spreading code sequences at a chip rate of the chip timing signal to produce first quadrature spread spectrum signals; and

a second phase shifting step of shifting a phase of the first quadrature spread spectrum signals by one selected from 0 and π

/4 according to a first timing signal of one-half the chip rate synchronous with the chip timing signal.

27. The method according to claim 26, wherein the first phase shifting step shifts a phase of the parallel data by one selected from 0+π

/2, -π

/2 and π

according to a combination of respective chip levels of the spreading code sequences.

28. The method according to claim 27, wherein the first phase shifting step comprises the steps of:

switching between first data and second data of the parallel data when the respective chip levels are not coincident with each other, to produce first output data and second output data;

a first sign inverting step of inverting a sign of the first output data when a chip level of one of the spreading code sequences is a predetermined logical value; and

a second sign inverting step of inverting a sign of the second output data when a chip level of the other of the spreading code sequences is the predetermined logical value.

29. The method according to claim 26, wherein the step of despreading the received quadrature spread spectrum signals comprises the steps of:

a third phase shifting step of shifting a phase of the received quadrature spread spectrum signals based on QPSK scheme at a recovered chip rate of the recovered chip timing signal according to the despreading code sequences to produce first quadrature despread data; and

a fourth phase shifting step of shifting a phase of the first quadrature despread data by one selected from 0 and -π

/4 according to a second timing signal of one-half the recovered chip rate synchronous with the recovered chip timing signal.

30. The method according to claim 29, wherein the third phase shifting step shifts a phase of the received quadrature spread spectrum signals by one selected from 0, -π

/2, +π

/2 and π

according to a combination of respective chip levels of the despreading code sequences.

31. The method according to claim 30, wherein the third phase shifting step comprises the steps of:

switching between an in-phase signal and a quadrature signal of the received quadrature spread spectrum signals when the respective chip levels of the despreading code sequences are not coincident with each other, to produce a first output in-phase signal and a second output quadrature signal;

a third sign inverting step of inverting a sign of the first output in-phase signal when a chip level of an in-phase component of the despreading code sequences is a predetermined logical value; and

a fourth sign inverting step of inverting a sign of the second output in-phase signal when a chip level of an quadrature component of the despreading code sequences is the predetermined logical value.

32. The method according to claim 25, wherein the step of spreading the parallel data comprises the step of:

spectrum spreading the parallel data such that the parallel data is mapped on a transmission signal constellation of π

/4-shift QPSK scheme according to respective logical levels of the spreading code sequences and the second timing signal of one-half the recovered chip rate synchronous with the recovered chip timing signal.

33. The method according to claim 32, wherein the spreading step further comprises the step of storing data of possible signal points of the transmission signal constellation, the possible signal points being addressed by a combination of the parallel data, the respective logical levels of the spreading code sequences, and the second timing signal.

34. The method according to claim 25, wherein the step of despreading the received quadrature spread spectrum signals comprises the steps of:

a third phase shifting step of shifting a phase of the received quadrature spread spectrum signals based on QPSK scheme at a recovered chip rate of the recovered chip timing signal according to the despreading code sequences to produce first quadrature despread data; and

a fourth phase shifting step of shifting a phase of the first quadrature despread data by one selected from 0 and -π

/4 according to a second timing signal of one-half the recovered chip rate synchronous with the recovered chip timing signal.

35. The method according to claim 34, wherein the fourth phase shifting step comprises the steps of:

switching between a first connection and a second connection to transfer the first quadrature despread data to one of the first and second connections according to the second timing signal;

receiving and accumulating, from the first connection, the first quadrature despread data in each symbol interval to produce first accumulated data;

receiving and accumulating, from the second connection, the first quadrature despread data in each symbol interval to produce second accumulated data;

shifting a phase of the second accumulated data by -π

/4 to produce phase-shifted second accumulated data; and

adding the first accumulated data and the phase-shifted second accumulated data to produce the received despread data.

36. The method according to claim 25, wherein the step of despreading the received quadrature spread spectrum signals comprises the steps of:

a third phase shifting step of shifting a phase of the received quadrature spread spectrum signals by one selected from 0 and -π

/4 according to the recovered chip timing signal and a second timing signal of one-half the recovered chip rate synchronous with the recovered chip timing signal, to produce phase-shifted quadrature spread spectrum signals;

a fourth phase shifting step of shifting a phase of the phase-shifted quadrature spread spectrum signals based on QPSK scheme at a recovered chip rate of the recovered chip timing signal according to the despreading code sequences to produce quadrature despread data; and

accumulating the quadrature despread data in each symbol interval to produce the received despread data.

37. The method according to claim 36, wherein the fourth phase shifting step shifts a phase of the phase-shifted quadrature spread spectrum signals by one selected from 0, -π

/2, +π

/2 and π

according to a combination of respective chip levels of the despreading code sequences.

38. The method according to claim 25, further comprising the steps of:

converting the received quadrature spread spectrum signals into digital quadrature spread spectrum signals according to a recovered chip timing signal; and

generating two despreading code sequences which are replicas of the spreading code sequences, respectively;

wherein the step of despreading the received quadrature spread spectrum signals comprises the steps of;

a third phase shifting step of shifting a phase of the digital quadrature spread spectrum signals based on QPSK scheme at a recovered chip rate of the recovered chip timing signal according to the despreading code sequences to produce first quadrature despread data; and

a fourth phase shifting step of shifting a phase of the first quadrature despread data by one selected from 0 and -π

/4 according to a second timing signal of one-half the recovered chip rate synchronous with the recovered chip timing signal.

39. The method according to claim 38, wherein the fourth phase shifting step comprises the steps of:

switching between a first connection and a second connection to transfer the first quadrature despread data to one of the first and second connections according to the second timing signal;

receiving and accumulating, from the first connection, the first quadrature despread data in each symbol interval to produce first accumulated data;

receiving an accumulating, from the second connection, the first quadrature despread data in each symbol interval to produce second accumulated data;

shifting a phase of the second accumulated data by -π

/4 to produce phase-shifted second accumulated data; and

adding the first accumulated data and the phase-shifted second accumulated data to produce the received despread data.

40. The method according to claim 39, further comprising the step of controlling the phase shifting step, the addition step, and the reproduction step with a program-controlled processor.

41. The method according to claim 25, further comprising the steps of:

converting the received quadrature spread spectrum signals into digital quadrature spread spectrum signals according to a recovered chip timing signal; and

generating two despreading code sequences which are replicas of the spreading code sequences, respectively;

wherein the step of despreading the received quadrature spread spectrum signals comprises the steps of;

a third phase shifting step of shifting a phase of the received quadrature spread spectrum signals by one selected from 0 and -π

/4 according to the recovered chip timing signal and a second timing signal of one-half the recovered chip rate synchronous with the recovered chip timing signal, to produce phase-shifted quadrature spread spectrum signals;

a fourth phase shifting step of shifting a phase of the phase-shifted quadrature spread spectrum signals based on QPSK scheme at a recovered chip rate of the recovered chip timing signal according to the despreading code sequences to produce quadrature despread data; and

accumulating the quadrature despread data in each symbol interval to produce the received despread data.

42. The method according to claim 41, wherein the fourth phase shifting step shifts a phase of the phase-shifted quadrature spread spectrum signals by one selected from 0, -π

/2 +π

/2 and π

according to a combination of respective chip levels of the despreading code sequences.

43. A method for spreading transmission data in a CDMA system, comprising the steps of:

converting the transmission data into an in-phase component and a quadrature component according to a symbol timing signal;

generating an in-phase spreading code sequence and a quadrature spreading code sequence according to a chip timing signal in each symbol interval; and

spreading the transmission data by phase-shifting the in-phase component and the quadrature component based on π

/4-shift QPSK scheme according to a combination of the in-phase spreading code sequence and the quadrature spreading code sequence.

44. A method for despreading a spread spectrum signal in a CDMA system, comprising the steps of:

converting the spread sprectrum signal into an in-phase digital component and a quadrature digital component according to a recovered chip timing signal;

generating an in-phase despreading code sequence and a quadrature despreading code sequence according to the recovered chip timing signal in each symbol interval; and

despreading the spread sprectrum signal by phase-shifting the in-phase digital component and the quadrature digital component based on π

/4-shift QPSK scheme according to a combination of the in-phase despreading code sequence and the quadrature despreading code sequence.