Method and system for efficient message validation

• US 5,958,029 A
• Filed: 10/20/1997
• Issued: 09/28/1999
• Est. Priority Date: 10/20/1997
• Status: Expired due to Term

• Current Assignee: NXP USA, Inc. (NXP Semiconductors NV)
• Original Assignee: Motorola, Inc. (Motorola Solutions, Inc.)
• Inventors: McKinnon, Gordon William
• Primary Examiner(s): Sheikh, Ayaz R.
• Assistant Examiner(s): THAI, XUAN MARIAN
• Application Number:
  US08/954,265
• Time in Patent Office: 708 Days
• Field of Search: 395/285, 395/286, 395/741, 395/840, 395/842, 395/868, 395/869, 710/100, 710/105, 710/106, 710/268, 710/20, 710/22, 710/23, 710/48, 710/49
• US Class Current: 710/100
• CPC Class Codes: G06F 13/385 for adaptation of a particular data processing system to different peripheral devices

Abstract

A communications processor (30) includes a DMA controller (34) and a module associated with a broadcast communications protocol such as a CAN module (50), both connected to a common internal bus (36). The CAN module (50) includes a single comparator (56) for comparison of multiple identifier mask values with the identifier of a message transmitted on the CAN bus (25). The communications processor (30) also includes a random access memory (RAM) (40) which stores the multiple identifier mask values which the DMA controller (34) automatically transfers to the CAN module (50) without intervention by the CPU (32). In addition, the CAN module (50) provides a valid message interrupt to the CPU (32) only after the message has been validated and does not interrupt the CPU (32) when messages intended only for other nodes are encountered.

Claims

1. A system for efficiently performing bus message validation, comprising:

a central processing unit;

an interface module having an interface suitable for communicating on an external broadcast bus, wherein the interface module may receive a plurality of bus messages communicated over the external broadcast bus, each of the plurality of bus messages containing a message identifier designating an intended receiving system for that bus message, and further wherein the interface module generates an interrupt when a bus message is received;

a memory storing multiple mask values;

a comparator coupled to the memory and the interface module, wherein the interface module transfers the message identifier to the comparator; and

a controller coupled to the interface module, the comparator and the memory, the controller being programmed to transfer in succession a first plurality of mask values of the multiple mask values to the comparator when the interrupt is generated;

wherein the comparator compares one or more transferred mask values of a plurality of mask values with the message identifier contained in a received bus message and provides an indication to the central processing unit when a comparison indicates a match, wherein a match validates the received bus message for the system.

2. The system of claim 1, wherein the interface module is a controller area network (CAN) module.

3. The system of claim 1, wherein the controller is a direct memory access (DMA) controller.

4. The system of claim 1, wherein the controller transfers a first mask value of the first plurality of mask values in response to the interrupt and transfers a next mask value of the plurality of mask values unless an indication is provided.

5. The system of claim 1, wherein the controller transfers a second plurality of mask values of the multiple mask values to the comparator if the comparison of each of the first plurality of mask values does not indicate a match.

6. The system of claim 1 further comprising a valid message register having an input coupled to the output of the comparator for indicating which of the plurality of transferred mask values resulted in the match.

7. A method of efficiently performing bus message validation in a system coupled to a broadcast bus, the system including a central processing unit (CPU), the method comprising:

receiving a bus message from the broadcast bus, wherein the bus message contains a message identifier designating an intended receiving system for the bus message;

retrieving in succession a first plurality of mask values from a memory by programming a controller separate from the CPU;

comparing the first plurality of mask values retrieved from the memory in a common comparator with the message identifier; and

validating the bus message for the system when the step of comparing indicates a match.

8. The method of claim 7, further comprising the step of executing code in the CPU concurrently with the step of comparing the first plurality of mask values retrieved from the memory with the message identifier.

9. The method of claim 7, further comprising repeating the steps of retrieving and comparing until the bus message received from the broadcast bus is validated.

10. The method of claim 9, further comprising continuing to retrieve mask values until a predetermined set of mask values have been compared and the bus message has not been validated.

11. The method of claim 7, further comprising the step of retrieving a second plurality of mask values when each of the first plurality of mask values have been compared and the step of comparing has not indicated a match.

12. The method of claim 7 further comprising the step of storing an indication indicating which of the plurality of transferred mask values resulted in the match in a valid message register.