Power management circuit

• US 5,959,372 A
• Filed: 12/16/1997
• Issued: 09/28/1999
• Est. Priority Date: 07/21/1997
• Status: Expired due to Fees

• Current Assignee: Emerson Electric Company
• Original Assignee: Emerson Electric Company
• Inventors: Every, Robert C.
• Primary Examiner(s): PALADINI, ALBERT WILLIAM
• Application Number:
  US08/991,115
• Time in Patent Office: 651 Days
• Field of Search: 307/113, 307/131, 361/154, 361/152, 73/700, 219/130.32, 379/377, 379/350, 363/97
• US Class Current: 307/131
• CPC Class Codes: G08C 19/02 in which the signal transmitted is magnitude of current or voltage G08C19/36, G08C19/38 take precedence

Abstract

An improved power management circuit for regulating current on a loop converts a high voltage, low current loop circuit to a low voltage source for devices associated with the loop. Additionally, the improved power manager provides a port for frequency shift key (FSK) transmit and receive signals.

Claims

1. A loop current regulating circuit for producing a demanded current in a loop current circuit that contains an actual current, comprising:

a current compare circuit receiving a demanded current signal, said current compare circuit comparing the actual current to the demanded current signal and producing a control signal;

an active upper device receiving said control signal and conducting based on said control signal to produce said demanded current;

an active lower device receiving said control signal and conducting based on said control signal to produce said demanded current, said active lower device biased to conduct only when needed to drain excess demanded current; and

an intermediate node where said active upper device and said lower device are electrically coupled, and said voltage at said intermediate node able to float to the voltage necessary to provide said demanded current.

2. The loop current regulating circuit of claim 1, further comprising:

a receive FSK circuit coupled to said current loop, said receive FSK circuit receiving frequency shift key signals from said loop current circuit; and

a transmit FSK circuit coupled to said loop current circuit, said transmit FSK circuit transmitting frequency shift key signals on said current loop.

3. The loop current regulating circuit of claim 1, further comprising:

an EMC filter; and

series blocking diodes.

4. The loop current regulating circuit of claim 1, wherein said upper active device is a MOSFET.

5. The loop current regulating circuit of claim 1, wherein said lower device is a MOSFET.

6. The loop current regulating circuit of claim 1, further comprising a reach up active device, said reach up active device receiving control signal from said comparison circuitry and controlling said active upper device and said lower device.

7. The loop current regulator of claim 6, wherein said reach up active device is an NPN transistor.

8. A power management circuit for producing a demanded current in a loop current circuit that contains an actual current and providing power to an associated device, comprising:

a current compare circuit receiving a demanded current signal, comparing said actual current to said demanded current signal and producing a control signal;

an active upper device receiving said control signal and conducting based on said control signal to produce said demanded current;

an active lower device receiving said control signal and conducting based on said control signal to produce said demanded current, said active lower device biased to conduct only when needed to drain excess demanded current;

an intermediate node where said active upper device and said lower device are electrically coupled having a voltage, and said voltage at said intermediate node able to float to the voltage necessary to provide said demanded current; and

a power regulating circuit receiving said voltage from said intermediate node and outputting at least one lesser voltage to said associated device.

9. The power management circuit of claim 8 wherein said power regulating circuit comprises:

a transient filter receiving voltage from said intermediate node and storing energy received from said intermediate node;

a switching regulator receiving voltage from said transient filter and outputting a lesser voltage; and

a linear regulator receiving a voltage from said loop current circuit and outputting a lesser voltage.

10. The power management circuit of claim 8, further comprising:

a power fail detect delay circuit providing a first signal to said active upper device to increase said voltage at said intermediate node and a second signal to said associated device when said voltage at said intermediate node is not enough for said power regulating circuit.

11. The power management circuit of claim 9 wherein the linear regulator shuts down the switching regulator when the voltage received by the linear regulator falls below a predetermined level.

12. A power management circuit for producing a demanded current in a loop current circuit that contains an actual current and providing power to an associated device, comprising:

a current compare circuit receiving a demanded current signal, comparing said actual current to said demanded current signal and producing a control signal;

an active upper device receiving said control signal and conducting based on said control signal to produce said demanded current;

an active lower device receiving said control signal and conducting based on said control signal to produce said demanded current, said lower device biased to conduct only when needed to drain excess demanded current;

an intermediate node where said active upper device and said lower device are electrically coupled, and said voltage at said intermediate node able to float to the voltage necessary to provide said demanded current;

a reach up active device, said reach up active device receiving control signal from said comparison circuitry and controlling said active upper device and said lower device;

a receive FSK circuit coupled to said current loop, said receive FSK circuit receiving frequency shift key signals from said current loop;

a transmit FSK circuit coupled to said current loop, said transmit FSK circuit transmitting frequency shift key signals on said current loop; and

a power regulating circuit receiving said voltage from said intermediate node and outputting at least one lesser voltage to said associated device.

13. A method of creating a demanded current in a loop current circuit containing an actual current, comprising the steps of:

sensing said actual current on said loop current circuit;

comparing said actual current to a signal representation of said demanded current;

creating a control signal from said comparison of said actual current and said signal representation of said demanded current; and

creating a demanded current by controlling an upper active device and a lower device with said control signal such that a voltage at an intermediate node between said upper active device and lower device can vary as necessary to attain said demanded current.

14. The method of creating a demanded current of claim 13, further comprising the steps of:

stepping down said voltage at said intermediate node; and

providing said stepped down voltage to an associated device.

15. A method of creating a demanded current in a loop current circuit containing an actual current, comprising the steps of:

sensing said actual current on said loop current circuit;

comparing said actual current to a signal representation of said demanded current;

creating a control signal from said comparison of said actual current and said signal representation of said demanded current;

creating a demanded current by controlling an upper active device and a lower device with said control signal such that voltage at an intermediate node between said upper active device and lower device can vary as necessary to attain said demanded current;

stepping down said voltage at said intermediate node; and

providing said stepped down voltage to an associated device.

16. A current regulating circuit for creating a demanded current for use in a loop current circuit with an actual voltage, comprising:

means for sensing said actual current on said loop current circuit;

means for comparing said actual current to a signal representation of said demanded current;

means for creating a control signal from comparison of actual current and said signal representation of said demanded current; and

means for creating a demanded current by controlling an upper active device and a lower device with said control signal such that voltage at an intermediate node between said upper active device and lower device can vary as necessary to attain said demanded current.

17. The loop current regulating circuit of claim 16, further comprising:

means for stepping down said voltage at said intermediate node; and

means for providing said stepped down voltage to an associated device.

18. The loop current regulating circuit of claim 16, further comprising means for receiving FSK signals and means for transmitting FSK signals.

19. A power management circuit for use in a loop current circuit with an actual current and a demanded current, comprising:

means for sensing said actual current on said loop current circuit;

means for comparing said actual current to a signal representation of said demanded current;

means for creating a control signal from comparison of actual current and said signal representation of said demanded current;

means for creating a demanded current by controlling an upper active device and a lower device with said control signal such that voltage at an intermediate node between said upper active device and lower device can vary as necessary to attain said demanded current;

means for stepping down said voltage at said intermediate node; and

means for providing said stepped down voltage to an associated device.