Active matrix type liquid-crystal display unit and method of driving the same

• US 5,959,599 A
• Filed: 11/04/1996
• Issued: 09/28/1999
• Est. Priority Date: 11/07/1995
• Status: Expired due to Term

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: Hirakata, Yoshiharu
• Primary Examiner(s): LAO, LUNYI
• Application Number:
  US08/742,404
• Time in Patent Office: 1,058 Days
• Field of Search: 345/87, 345/92, 345/93, 345/94, 345/95, 345/96, 345/204, 345/208, 345/209, 345/210, 349/41, 349/42, 349/48, 349/47
• US Class Current: 345/92
• CPC Class Codes: G09G 2300/0434 Flat panel display in which a field is applied parallel to the display plane
• CPC Class Codes: G09G 2300/0814 used for selection purposes, e.g. logical AND for partial update
• CPC Class Codes: G09G 2300/0823 used to establish symmetry in driving, e.g. with polarity inversion
• CPC Class Codes: G09G 3/3659 the addressing of the pixel involving the control of two or more scan electrodes or two or more data electrodes, e.g. pixel voltage dependant on signal of two data electrodes

Abstract

A data signal having a single polarity is outputted from a data driver of an in-plane switching type liquid-crystal display unit. In a unit pixel, an input transistor and an exhaust transistor T2 are connected to one electrode of a liquid-crystal element LC, and an input transistor and an exhaust transistor are connected to the other electrode. One input transistor and one exhaust transistor connected to the same scanning line are paired, and another input transistor and another exhaust transistor connected to another same scanning line are paired. Those paired transistors are alternately driven, thereby being capable of inverting the potential between electrodes of the liquid-crystal element even when the polarity of the data signal is single.

Claims

1. An in-plane switching type active matrix type liquid-crystal display unit comprising:

first and second scanning lines that do not intersect with each other;

a data line that intersects with said first and second scanning lines;

an earth line that intersects with said first and second scanning lines but does not intersect with said data line;

a pair of first and second electrodes that hold liquid crystal therebetween; and

first to fourth switching circuits, in which said first and second electrodes and said first to fourth switching circuits are disposed in a region surrounded by said first and second scanning lines, said data line and said earth line, and are disposed on the same substrate;

wherein said first to fourth switching circuits include a circuit having at least one transistor connected in series, respectively;

wherein in transistors connected in series in said first switching circuit, a source of a first transistor is connected to said data line, gates of all the transistors are connected to said first scanning line;

wherein in transistors connected in series in said second switching circuit, a source of a first transistor is connected to said earth line, gates of all the transistors are connected to said second scanning line;

wherein in said first and second switching circuits, drains of final transistors are connected to said first electrode, respectively;

wherein in transistors connected in series in said third switching circuit, a source of a first transistor is connected to said date line, gates of all the transistors are connected to said second scanning line;

wherein in transistors connected in series in said fourth switching circuit, a source of a first transistor is connected to said earth line, gates of all the transistors are connected to said first scanning line; and

wherein in said third and fourth switching circuits, drains of final transistors are connected to said second electrode, respectively.

2. The unit of claim 1 wherein said first switching circuit and said third switching circuit comprise transistors of the same number, respectively.

3. The unit of claim 1 wherein said second switching circuit and said fourth switching circuit comprise transistors of the same number, respectively.

4. The unit of claim 1 wherein said first to fourth switching circuits comprise transistors of the same number, respectively.

5. A method of driving an in-plane switching type active matrix type liquid-crystal display unit comprising:

first and second scanning lines that do not intersect with each other;

a data line that intersects with said first and second scanning lines;

an earth line that intersects with said first and second scanning lines but does not intersect with said data line;

a pair of first and second electrodes that hold liquid crystal therebetween; and

first to fourth switching circuits, in which said first and second electrodes and said first to fourth switching circuits are disposed in a region surrounded by said first and second scanning lines, said data line and said earth line, and are disposed on the same substrate;

wherein said first to fourth switching circuits include a circuit having at least one transistor connected in series, respectively;

wherein in transistors connected in series in said first switching circuit, a source of a first transistor is connected to said data line, gates of all the transistors are connected to said first scanning line;

wherein in transistors connected in series in said second switching circuit, a source of a first transistor is connected to said earth line, gates of all the transistors are connected to said second scanning line;

wherein in said first and second switching circuits, drains of final transistors are connected to said first electrode, respectively;

wherein in transistors connected in series in said third switching circuit, a source of a first transistor is connected to said date line, gates of all the transistors are connected to said second scanning line;

wherein in transistors connected in series in said fourth switching circuit, a source of a first transistor is connected to said earth line, gates of all the transistors are connected to said first scanning line; and

wherein in said third and fourth switching circuits, drains of final transistors are connected to said second electrode, respectively;

characterized in that pulses are not simultaneously supplied to said third and fourth scanning lines.

6. The method of claim 5 wherein in a field in which a pulse is applied to said first scanning line, no pulse is applied to said second scanning line, and in a field subsequent to said field, no pulse is applied to said first scanning line and a pulse is applied to said second scanning line.

7. The method of claim 5 wherein in a field in which a pulse is applied to at least one first scanning line, no pulse is applied to all the second scanning lines, and in a field subsequent to the field, a pulse is applied to at least one second scanning line, and no pulse is applied to all the first scanning line.

8. The method of claim 5 wherein in a field in which a pulse is applied to a first scanning line on an arbitrary line, no pulse is applied to a second scanning line on said arbitrary line, and no pulse is applied to any first scanning lines on two lines adjacent to said arbitrary line, and pulses are applied to both the second scanning lines on two lines adjacent to said arbitrary line.

9. A method of driving an in-plane switching type active matrix type liquid-crystal display unit comprising:

first and second scanning lines that do not intersect with each other;

a data line that intersects with said first and second scanning lines;

an earth line that intersects with said first and second scanning lines but does not intersect with said data line;

a pair of first and second electrodes that hold liquid crystal therebetween; and

first to fourth switching circuits, in which said first and second electrodes and said first to fourth switching circuits are disposed in a region surrounded by said first and second scanning lines, said data line and said earth line, and are disposed on the same substrate;

wherein said first to fourth switching circuits include a circuit having at least one transistor connected in series, respectively;

wherein in transistors connected in series in said first switching circuit, a source of a first transistor is connected to said data line, gates of all the transistors are connected to said first scanning line;

wherein in transistors connected in series in said second switching circuit, a source of a first transistor is connected to said earth line, gates of all the transistors are connected to said second scanning line;

wherein in said first and second switching circuits, drains of final transistors are connected to said first electrode, respectively;

wherein in transistors connected in series in said third switching circuit, a source of a first transistor is connected to said date line, gates of all the transistors are connected to said second scanning line;

wherein in transistors connected in series in said fourth switching circuit, a source of a first transistor is connected to said earth line, gates of all the transistors are connected to said first scanning line; and

wherein in said third and fourth switching circuits, drains of final transistors are connected to said second electrode, respectively;

characterized in that a potential level of a signal inputted to said data line is always of a single polarity.

10. The method of claim 9 wherein in a field in which a pulse is applied to at least one first scanning line, no pulse is applied to all the second scanning lines, and in a field subsequent to the field, a pulse is applied to at least one second scanning line, and no pulse is applied to all the first scanning line.

11. The method of claim 9 wherein in a field in which a pulse is applied to a first scanning line on an arbitrary line, no pulse is applied to a second scanning line on said arbitrary line, and no pulse is applied to any first scanning lines on two lines adjacent to said arbitrary line, and pulses are applied to both the second scanning lines on two lines adjacent to said arbitrary line.

12. An in-plane switching type active matrix type liquid-crystal display unit comprising:

first and second scanning lines that do not intersect with each other;

a data line that intersects with said first and second scanning lines;

an earth line that intersects with said first and second scanning lines but does not intersect with said data line;

a pair of first and second electrodes that hold liquid crystal therebetween; and

first to fourth switching circuits, in which said first and second electrodes and said first to fourth switching circuits are disposed in a region surrounded by said first and second scanning lines, said data line and said earth line, and are disposed on the same substrate;

wherein said first to fourth switching circuits include a circuit having at least one transistor connected in series, respectively;

wherein among transistors connected in series in said first switching circuit, a source of a first transistor is connected to said data line, and gates of all the transistors are connected to said first scanning line;

wherein among transistors connected in series in said second switching circuit, a source of a first transistor is connected to said earth line, gates of all the transistors are connected to said second scanning line;

wherein among said first and second switching circuits, drains of final transistors are connected to said first electrode, respectively;

wherein among transistors connected in series in said third switching circuit, a source of a first transistor is connected to said date line, and gates of all the transistors are connected to said second scanning line;

wherein among transistors connected in series in said fourth switching circuit, a source of a first transistor is connected to said earth line, and gates of all the transistors are connected to said first scanning line;

wherein among said third and fourth switching circuits, drains of final transistors are connected to said second electrode, respectively, and

wherein an image signal of a single polarity is supplied to said data line.