Active matrix X-ray imaging array
First Claim
1. An active matrix imager, comprising:
- a) an array of thin film transistors disposed in a plurality of rows and columns, each of said transistors having a control terminal and a pair of signal terminals;
b) a dielectric layer overlying each of said thin film transistors;
c) scanning control circuit means having a plurality of control lines, respective ones of said control lines being connected to the control terminals of each of the thin film transistors in respective ones of said rows;
d) read out circuit means having a plurality of data lines, respective ones of said data lines being connected to a first one of said pair of signal terminals of each of the thin film transistors in respective ones of said columns;
e) a plurality of pixel electrodes respectively connected to a second one of said pair of signal terminals of each of the thin film transistors in said array of thin film transistors;
f) a plurality of storage capacitors connected to respective ones of said pixel electrodes;
g) a photoconductive layer overlying said plurality of pixel electrodes and said dielectric layer, wherein electron-hole pairs are created in response to exposing said photoconductive layer to radiation;
h) a bias electrode overlying said photoconductive layer;
i) first voltage means for establishing a high voltage difference between said bias electrode and respective ones of said pixel electrodes, whereby charges created by said electron-hole pairs are collected on respective ones of said pixel electrodes and stored on respective ones of said storage capacitors, the amount of said collected charges being proportional to intensity of said radiation exposure; and
j) means overlying said first one of said pair of signal terminals of each of the thin film transistors in respective ones of said columns for establishing an electric field for repelling said charges in the vicinity of said first one of said pair of signal terminals toward said pixel electrodes, wherein said means overlying said first one of said pair of signal terminals of each of the thin film transistors further comprises a plurality of grid lines connected to a source of opposite polarity voltage to said bias electrode.
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Accused Products
Abstract
A digital detector for radiography and fluoroscopy is disclosed. The detector includes a large area, flat panel that easily fits into a conventional X-ray room bucky tray. The detector utilizes a layer of photoconductor (i.e. a-Se in the preferred embodiment) to detect X-rays and convert the X-ray energy to charge, and an active matrix TFT array in the form of a very large area integrated circuit, for readout of the charge. A dual gate structure is used for the TFT array wherein the top gate is formed as an extension of the pixel electrode, so as to provide high voltage protection of the TFT. An integrated pixel storage capacitor is provided for enhanced absorption of X-ray energy with low pixel voltage, low leakage current and a large charge leakage time constant. In a preferred embodiment, the integrated pixel storage capacitor is created by overlapping the pixel the pixel electrode with an adjacent gate line or a separate ground line of the active matrix readout array. Image charge collection efficiency is enhanced by manipulating the electric field distribution in the photoconductor layer so that image charges land on the pixel electrodes, and not on the TFT readout devices.
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Citations
18 Claims
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1. An active matrix imager, comprising:
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a) an array of thin film transistors disposed in a plurality of rows and columns, each of said transistors having a control terminal and a pair of signal terminals; b) a dielectric layer overlying each of said thin film transistors; c) scanning control circuit means having a plurality of control lines, respective ones of said control lines being connected to the control terminals of each of the thin film transistors in respective ones of said rows; d) read out circuit means having a plurality of data lines, respective ones of said data lines being connected to a first one of said pair of signal terminals of each of the thin film transistors in respective ones of said columns; e) a plurality of pixel electrodes respectively connected to a second one of said pair of signal terminals of each of the thin film transistors in said array of thin film transistors; f) a plurality of storage capacitors connected to respective ones of said pixel electrodes; g) a photoconductive layer overlying said plurality of pixel electrodes and said dielectric layer, wherein electron-hole pairs are created in response to exposing said photoconductive layer to radiation; h) a bias electrode overlying said photoconductive layer; i) first voltage means for establishing a high voltage difference between said bias electrode and respective ones of said pixel electrodes, whereby charges created by said electron-hole pairs are collected on respective ones of said pixel electrodes and stored on respective ones of said storage capacitors, the amount of said collected charges being proportional to intensity of said radiation exposure; and j) means overlying said first one of said pair of signal terminals of each of the thin film transistors in respective ones of said columns for establishing an electric field for repelling said charges in the vicinity of said first one of said pair of signal terminals toward said pixel electrodes, wherein said means overlying said first one of said pair of signal terminals of each of the thin film transistors further comprises a plurality of grid lines connected to a source of opposite polarity voltage to said bias electrode. - View Dependent Claims (3, 4, 5)
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2. An active matrix imager, comprising:
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a) an array of thin film transistors disposed in a plurality of rows and columns, each of said transistors having a control terminal and a pair of signal terminals; b) a dielectric layer overlying each of said thin film transistors; c) scanning control circuit means having a plurality of control lines, respective ones of said control lines being connected to the control terminals of each of the thin film transistors in respective ones of said rows; d) read out circuit means having a plurality of data lines, respective ones of said data lines being connected to a first one of said pair of signal terminals of each of the thin film transistors in respective ones of said columns; e) a plurality of pixel electrodes respectively connected to a second one of said pair of signal terminals of each of the thin film transistors in said array of thin film transistors; f) a plurality of storage capacitors connected to respective ones of said pixel electrodes; g) a photoconductive layer overlying said plurality of pixel electrodes and said dielectric layer, wherein electron-hole pairs are created in response to exposing said photoconductive layer to radiation; h) a bias electrode overlying said photoconductive layer; i) first voltage means for establishing a high voltage difference between said bias electrode and respective ones of said pixel electrodes, whereby charges created by said electron-hole pairs are collected on respective ones of said pixel electrodes and stored on respective ones of said storage capacitors, the amount of said collected charges being proportional to intensity of said radiation exposure; and j) means overlying said first one of said pair of signal terminals of each of the thin film transistors in respective ones of said columns for establishing an electric field for repelling said charges in the vicinity of said first one of said pair of signal terminals toward said pixel electrodes, wherein said means overlying said first one of said pair of signal terminals of each of the thin film transistors further comprises a dielectric layer for absorbing said charges and thereby building up a repellent field to said charges over time. - View Dependent Claims (16, 17, 18)
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6. An active matrix imager, comprising:
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a) an array of thin film transistors disposed in a plurality of rows and columns, each of said transistors having a first control terminal and a pair of signal terminals; b) a dielectric layer overlying each of said thin film transistors; c) scanning control circuit means having a plurality of control lines, respective ones of said control lines being connected to the control terminals of each of the thin film transistors in respective ones of said rows; d) read out circuit means having a plurality of data lines, respective ones of said data lines being connected to a first one of said pair of signal terminals of each of the thin film transistors in respective ones of said columns; e) a plurality of pixel electrodes respectively connected to a second one of said pair of signal terminals of each of the thin film transistors in said array of thin film transistors; f) a plurality of storage capacitors connected to respective ones of said pixel electrodes; g) a photoconductive layer overlying said plurality of pixel electrodes and said dielectric layer, wherein electron-hole pairs are created in response to exposing said photoconductive layer to radiation; h) a bias electrode overlying said photoconductive layer; i) first voltage means for establishing a high voltage difference between said bias electrode and respective ones of said pixel electrodes, whereby charges created by said electron-hole pairs are collected on respective ones of said pixel electrodes and stored on respective ones of said storage capacitors, the amount of said collected charges being proportional to intensity of said radiation exposure; and j) a further control terminal opposite said first control terminal of each of said thin film transistors, each said further control terminal forming an extension of a respective one of said pixel electrodes such that for a predetermined thickness of said dielectric layer each of said thin film transistors remains enabled in the event of a pixel voltage in excess of a predetermined amount irrespective of a disable voltage being applied to said first control terminal, thereby providing protection of said thin film transistors against excessively high pixel voltages. - View Dependent Claims (7, 8)
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9. An active matrix imager, comprising:
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a) an array of thin film transistors disposed in a plurality of rows and columns, each of said transistors having a first control terminal and a pair of signal terminals; b) a dielectric layer overlying each of said thin film transistors; c) scanning control circuit means having a plurality of control lines, respective ones of said control lines being connected to the control terminals of each of the thin film transistors in respective ones of said rows; d) read out circuit means having a plurality of data lines, respective ones of said data lines being connected to a first one of said pair of signal terminals of each of the thin film transistors in respective ones of said columns; e) a plurality of pixel electrodes respectively connected to a second one of said pair of signal terminals of each of the thin film transistors in said array of thin film transistors; f) a plurality of storage capacitors connected to respective ones of said pixel electrodes; g) a photoconductive layer overlying said plurality of pixel electrodes and said dielectric layer, wherein electron-hole pairs are created in response to exposing said photoconductive layer to radiation; h) a bias electrode overlying said photoconductive layer; i) first voltage means for establishing a high voltage difference between said bias electrode and respective ones of said pixel electrodes, whereby charges created by said electron-hole pairs are collected on respective ones of said pixel electrodes and stored on respective ones of said storage capacitors, the amount of said collected charges being proportional to intensity of said radiation exposure; j) a plurality of radiation dosage detection regions in said bias electrode for receiving and collecting opposite ones of said charges created by said electron-hole pairs; and k) amplifier means connected to said radiation dosage detection regions for generating an output signal representing cumulative exposure of the imager to said radiation. - View Dependent Claims (10, 11, 12, 13, 14, 15)
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Specification