Nonvolatile semiconductor memory device

• US 5,962,891 A
• Filed: 10/03/1996
• Issued: 10/05/1999
• Est. Priority Date: 10/03/1995
• Status: Expired due to Fees

• Current Assignee: Kabushiki Kaisha Toshiba (Toshiba Corporation)
• Original Assignee: Kabushiki Kaisha Toshiba (Toshiba Corporation)
• Inventors: Arai, Norihisa
• Primary Examiner(s): Martin-Wallace, Valencia
• Assistant Examiner(s): Eckert, II, George C.
• Application Number:
  US08/725,231
• Time in Patent Office: 1,097 Days
• Field of Search: 257/324, 257/406, 257/317, 257/321, 257/296, 257/390, 257/408, 257/905
• US Class Current: 257/324
• CPC Class Codes: H10B 41/30 characterised by the memory core region
• CPC Class Codes: H10B 69/00 Erasable-and-programmable ROM [EPROM] devices not provided for in groups H10B41/00 - H10B63/00, e.g. ultraviolet erasable-and-programmable ROM [UVEPROM] devices

Abstract

The semiconductor device having a multilayer gate type transistor constituting memory, comprises a P-type semiconductor substrate, a source formed by diffusing an N-type impurity on a surface of the semiconductor substrate to a first depth, an N-type drain, electrically separated from the source and formed on a surface of the semiconductor substrate, a first insulating film formed on a surface of a channel region between the source and the drain, a first gate electrode formed on a surface of the first insulating film, a second insulating film formed on a surface of the first gate electrode, and a second gate electrode on the second insulating film. The semiconductor device further comprises a source wiring region, which is connected to the source of the multilayer gate transistor and formed by diffusing the N-type impurity in the semiconductor substrate to a second depth shallower than the first depth.

Claims

1. A semiconductor device comprising:

a semiconductor substrate of a first conductivity type;

at least two transistors each including,

a source having an impurity of a second conductivity type in said semiconductor substrate diffused to a first depth;

a drain of the second conductivity type, electrically separated from said source and formed on a surface of said semiconductor substrate;

a first insulating film formed on a surface of a channel region between said source and said drain;

a first gate electrode formed on a surface of said first insulating film; and

a second insulating film formed on a surface of said first gate electrode; and

a source wiring layer connected to said source of each of said at least two transistors and having the impurity of the second conductivity type in said semiconductor substrate diffused to a second depth shallower than the first depth.

2. The semiconductor device according to claim 1, wherein each of said at least two transistors further comprises a second gate electrode formed on a surface of said second insulating film, and wherein each of said at least two transistors is a multilayer gate type transistor, and wherein said drain has a diffused impurity of the same second conductivity type as said source wiring layer.

3. A semiconductor device according to claim 1, wherein said first gate electrode includes a first portion located closer to said source than said drain and a second portion located closer to said drain than said source, wherein an impurity concentration is greater in said first portion than in said second portion.

4. The semiconductor device according to claim 1, wherein said source is formed by double diffusion of the impurity of the second conductivity type.

5. The semiconductor device according to claim 1, wherein said drain has a shallower depth than said source.

6. The semiconductor device according to claim 1, wherein said drain has the impurity of the second conductivity type in said semiconductor substrate diffused to a third depth different from the first depth.

7. The semiconductor device according to claim 6, wherein the third depth is approximately equal to the second depth.

8. A semiconductor device comprising:

a semiconductor substrate of a first conductivity type;

at least two transistors each including,

a source and a drain of a second conductivity type, formed on a surface of said semiconductor substrate in an electrically separated manner;

a first insulating film formed on a surface of a channel region between said source and drain;

a first gate electrode formed on a surface of said first insulating film;

a second insulating film formed on a surface of said first gate electrode;

a third insulating film formed on a surface of said drain;

a source wiring layer connected to said source of each of said at least two transistors and having an impurity of a second conductivity type diffused in said semiconductor substrate;

a fourth insulating film formed on a surface of said source wiring layer; and

a fifth insulating film formed on a surface of said source of each of said at least two transistors, and having a thickness greater than a thickness of one of said third insulating film and said fourth insulating film.

9. The semiconductor device according to claim 8, wherein each of said at least two transistors further comprises a second gate electrode formed on a surface of said second insulating film, and wherein each of said at least two transistors is a multilayer gate type transistor, and wherein said drain has a diffused impurity of the same second conductivity type as said source wiring layer.

10. A semiconductor device according to claim 8, wherein said first gate electrode includes a first portion located closer to said source than said drain and a second portion located closer to said drain than said source, wherein an impurity concentration is greater in said first portion than in said second portion.

11. The semiconductor device according to claim 8, wherein said source is formed by double diffusion of the impurity of the second conductivity type.

12. The semiconductor device according to claim 8, wherein a thickness of said fifth insulating film is greater than a thickness of each of said third insulating film and said fourth insulating film.

13. A semiconductor device comprising:

a semiconductor substrate of a first conductivity type;

at least two transistors each including,

a source having an impurity of a second conductivity type in said semiconductor substrate diffused to a first depth;

a drain of a second conductivity type, electrically separated from said source and formed on a surface of said semiconductor substrate;

a first insulating film formed on a surface of a channel region between said source and said drain;

a first gate electrode formed on a surface of said first insulating film;

a second insulating film formed on a surface of said first gate electrode; and

a third insulating film formed on a surface of said drain;

a source wiring layer connected to said source of each of said at least two transistors and by having the impurity of the second conductivity type in said semiconductor substrate diffused to a second depth shallower than the first depth;

a fourth insulating film formed on a surface of said source wiring layer; and

a fifth insulating film formed on a surface of said source of each of said at least two transistors, and having a thickness greater than a thickness of one of said third insulating film and said fourth insulating film.