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Semiconductor device having a low thermal budget metal filling and planarization of contacts, vias and trenches

  • US 5,962,923 A
  • Filed: 08/07/1995
  • Issued: 10/05/1999
  • Est. Priority Date: 08/07/1995
  • Status: Expired due to Term
First Claim
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1. An electrical contact structure in a multilayer integrated circuit, wherein an aspect ratio of an aperture within which said electrical contact is formed exceeds 1:

  • 1, and wherein a width dimension of said aperture is approxinately 0.5μ

    or smaller, said electrical contact structure comprising;

    an aperture sidewall lining composed of a carrier layer having a surface roughness of less than 40 Å

    ; and

    a conductor deposited over said carrier layer and reflowed to fill said aperture.

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