High dynamic range low noise transconductance amplifier

• US 5,963,092 A
• Filed: 11/26/1997
• Issued: 10/05/1999
• Est. Priority Date: 11/29/1996
• Status: Expired due to Term

• Current Assignee: SGS-Thomson Microelectronics (STMicroelectronics NV)
• Original Assignee: SGS-Thomson Microelectronics (STMicroelectronics NV)
• Inventors: Van Zalinge, Klaas
• Primary Examiner(s): Mottola, Steven J.
• Application Number:
  US08/980,194
• Time in Patent Office: 678 Days
• Field of Search: 330/252, 330/261, 330/260, 327/359
• US Class Current: 330/252
• CPC Class Codes: H03F 2203/45291 the active amplifying circuit [AAC] comprising balancing means
• CPC Class Codes: H03F 2203/45392 the AAC comprising resistors in the source circuit of the AAC before the common source coupling
• CPC Class Codes: H03F 3/45085 Long tailed pairs H03F3/45112, H03F3/45139 take precedence
• CPC Class Codes: H03F 3/50 Amplifiers in which input is applied to, or output is derived from, an impedance common to input and output circuits of the amplifying element, e.g. cathode follower

Abstract

A differential transconductance amplifier includes two first NPN transistors, whose bases receive a differential input voltage, and whose collectors are coupled to a first supply voltage through two respective first current sources; two second NPN transistors respectively coupling the emitters of the first transistors to a second supply voltage, and whose bases are coupled to the collectors of the respective first transistors through level shifters; and a resistive means coupled between the emitters of the first transistors. Each level shifter includes a third PNP transistor coupled between the collector of the respective first transistor and the base of the respective second transistor, and whose control terminal receives a constant bias voltage independent of the differential input voltage.

Claims

1. A differential transconductance amplifier comprising:

two first bipolar transistors of a first conductivity type, having bases that receive a differential input voltage, and having collectors that are coupled to a first supply voltage through two respective first current sources;

two second bipolar transistors of the first conductivity type, respectively coupling the emitters of the first transistors to a second supply voltage, and whose bases are coupled to the collectors of the respective first transistors through level shifters; and

a resistive means coupled between the emitters of the first transistors;

wherein each level shifter comprises a third transistor of a second conductivity type, coupled between the collector of the respective first transistor and the base of the respective second transistor, and having a control terminal that receives a constant bias voltage independent of the differential input voltage.

2. The amplifier according to claim 1, further comprising a second current source coupled between the first supply voltage and the connection node between two series connected resistors forming the resistive means.

3. The amplifier according to claim 2, the bias voltage is chosen offset from the first supply voltage of a value substantially equal to a saturation voltage of the respective first current source, plus a voltage drop between the control terminal of the third transistor and the collector of the respective first transistor.

4. The amplifier according to claim 1, wherein the first conductivity type is NPN.

5. The amplifier according to claim 1 wherein the two first bipolar transistors are each NPN transistors.

6. The amplifier according to claim 5 wherein the two second bipolar transistors are each NPN transistors.

7. The amplifier according to claim 6 wherein the third transistor is a PNP transistor.

8. A differential transconductance amplifier comprising:

two first bipolar transistors of a first conductivity type, having bases that receive a differential input voltage, and having collectors that are coupled to a first supply voltage through two respective first current sources;

two second bipolar transistors of the first conductivity type, respectively coupling the emitters of the first transistors to a second supply voltage, and whose bases are coupled to the collectors of the respective first transistors through level shifters;

a pair of series connected resistors forming a resistive means and having a node defined therebetween; and

a second current source coupled between the first supply voltage and the resistive means node.

9. The amplifier according to claim 8 wherein each level shifter comprises a third transistor of a second conductivity type, coupled between the collector of the respective first transistor and the base of the respective second transistor, and having a control terminal that receives a constant bias voltage independent of the differential input voltage.

10. The amplifier according to claim 9 wherein the bias voltage is chosen offset from the first supply voltage of a value substantially equal to a saturation voltage of the respective first current source, plus a voltage drop between the control terminal of the third transistor and the collector of the respective first transistor.

11. The amplifier according to claim 9 wherein the two first bipolar transistors are each NPN transistors.

12. The amplifier according to claim 11 wherein the two second bipolar transistors are each NPN transistors.

13. The amplifier according to claim 12 wherein the third transistor is a PNP transistor.

14. A differential amplifier comprising:

two first bipolar transistors of a first conductivity type, having bases that receive a differential input voltage;

a first supply voltage;

two first current sources connected from the first supply voltage to respect collectors of the two first bipolar transistors;

two second bipolar transistor of the first conductivity type;

a second supply voltage;

two level shifters;

said second bipolar transistors respectively coupling the emitters of the first transistors to said second supply voltage, and whose bases are coupled to the collectors of the respective first transistors through said level shifters; and

a resistive means coupled between the emitters of the first transistors;

wherein each level shifter comprises a third transistor of a second conductivity type, coupled between the collector of the respective first transistor and the base of the respective second transistor, and having a control terminal that receives a constant bias voltage independent of the differential input voltage.

15. The amplifier according to claim 14 further comprising a second current source coupled between the first supply voltage and the connection node between two series connected resistors forming the resistive means.

16. The amplifier according to claim 15, the bias voltage is chosen offset from the first supply voltage of a value substantially equal to a saturation voltage of the respective first current source, plus a voltage drop between the control terminal of the third transistor and the collector of the respective first transistor.

17. The amplifier according to claim 14, wherein the first conductivity type is NPN.

18. A differential amplifier comprising:

two first bipolar transistors of a first conductivity type, having bases that receive a differential input voltage;

a first supply voltage;

two first current sources connected from the first supply voltage to respect collectors of the two first bipolar transistors;

two second bipolar transistor of the first conductivity type;

a second supply voltage;

two level shifters;

said second bipolar transistors respectively coupling the emitters of the first transistors to said second supply voltage, and whose bases are coupled to the collectors of the respective first transistors through said level shifters; and

a pair of series connected resistors forming a resistive means and having a node defined therebetween; and

a second current source coupled between the first supply voltage and the resistive means node.

19. The amplifier according to claim 18 wherein each level shifter comprises a third transistor of a second conductivity type, coupled between the collector of the respective first transistor and the base of the respective second transistor, and having a control terminal that receives a constant bias voltage independent of the differential input voltage.

20. The amplifier according to claim 19 wherein the bias voltage is chosen offset from the first supply voltage of a value substantially equal to a saturation voltage of the respective first current source, plus a voltage drop between the control terminal of the third transistor and the collector of the respective first transistor.

21. A differential amplifier comprising:

two first bipolar transistors of a first conductivity type, having bases that receive a differential input voltage;

a first supply voltage means;

two first current source means;

means for connecting the collectors of said two first bipolar transistors to the first supply voltage through said two respective first current sources;

two second bipolar transistors of the first conductivity type;

a second supply voltage means;

two first level shifter means;

said two second bipolar transistors including means for respectively coupling the emitters of the first transistor to said second supply voltage and for coupling the bases to the collectors of the respective first transistors through said level shifter means;

a resistive means coupled between the emitters of the first transistors;

wherein each level shifter means comprises a third transistor of a second conductivity type, coupled between the collector of the respective first transistor and the base of the respective second transistor, and having a control terminal that receives a constant bias voltage independent of the differential input voltage.

22. The amplifier according to claim 21 further comprising a second current source means coupled between the first supply voltage means and the connection node between two series connected resistors forming the resistive means.

23. The amplifier according to claim 22 wherein the bias voltage is chosen offset from the first supply voltage of a value substantially equal to a saturation voltage of the respective first current source, plus a voltage drop between the control terminal of the third transistor and the collector of the respective first transistor.

24. A differential amplifier comprising:

two first bipolar transistors of a first conductivity type, having bases that receive a differential input voltage;

a first supply voltage means;

two first current source means;

means for connecting the collectors of said two first bipolar transistors to the first supply voltage through said two respective first current sources;

two second bipolar transistors of the first conductivity type;

a second supply voltage means;

two first level shifter means;

said two second bipolar transistors including means for respectively coupling the emitters of the first transistor to said second supply voltage and for coupling the bases to the collectors of the respective first transistors through said level shifter means;

a pair of series connected resistors forming a resistive means and having a node defined therebetween; and

a second current source means coupled between the first supply voltage means and the resistive means node.

25. The amplifier according to claim 24 wherein each level shifter means comprises a third transistor of a second conductivity type, coupled between the collector of the respective first transistor and the base of the respective transistor, and having a control terminal that receives a constant bias voltage independent of the differential input voltage.