Method and apparatus for the addition and removal of a dither signal

• US 5,963,157 A
• Filed: 06/23/1997
• Issued: 10/05/1999
• Est. Priority Date: 06/23/1997
• Status: Expired due to Fees

• Current Assignee: Motorola, Inc. (Motorola Solutions, Inc.)
• Original Assignee: Motorola, Inc. (Motorola Solutions, Inc.)
• Inventors: Smith, Paul F.
• Primary Examiner(s): YOUNG, BRIAN K
• Application Number:
  US08/880,480
• Time in Patent Office: 834 Days
• Field of Search: 341/131, 341/144, 364/602, 327/105
• US Class Current: 341/131
• CPC Class Codes: H03M 1/0641 the dither being a random signal
• CPC Class Codes: H03M 1/66 Digital/analogue converters H03M1/001 – H03M1/10 take precedence

Abstract

The addition and removal of a dither signal takes place by generation of a first signal (102) and a second signal (104) by a first signal source (151) and a second signal source (152). A dither generator (103) is provided that generates a dither signal (106) that is added to the first signal (102) and subtracted from the second signal (104). The first signal (102) with dither added, and the second signal (104) with dither subtracted enter respective Digital to Analog Converters (DACs) (109, 111) and are converted to analog signal equivalents. Finally, the respective analog signal equivalents are summed together to form a composite signal with the dither signal (106) substantially eliminated.

Claims

1. A method for adding and removing dither from a first and a second digital signal, the method comprising the steps of:

generating a first digital signal and a second digital signal;

generating a first dither signal and a second dither signal;

combining the first dither signal at a first phase with the first digital signal to produce a first digital signal with dither;

combining the second dither signal at a second phase with the second digital signal to produce a second digital signal with dither, wherein the second phase is substantially 180 degrees offset from the first phase;

converting the first digital signal with dither to a first analog signal with dither;

converting the second digital signal with dither to a second analog signal with dither; and

combining the first and the second analog signals to produce a third analog signal having the dither substantially removed.

2. The method of claim 1 wherein the steps of combining dither comprises the steps of adding dither via an addition operation.

3. The method of claim 1 wherein the step of combining the first and the second analog signals comprises the step of adding the first and the second analog signals.

4. A method for adding and removing a dither signal from a plurality of signals, wherein a sum of the plurality of signals equals a first value, the method comprising the steps of:

generating a plurality of signals;

generating a plurality of dither signals;

combining the plurality of dither signals at a plurality of phases with the plurality of signals to produce a plurality of signals with dither, wherein a sum of the plurality of signals with dither is substantially equal to the first value;

converting the plurality of signals with dither to a second plurality of signals with dither; and

combining the second plurality of signals with dither to form a combined signal having the plurality of dither signals substantially eliminated.

5. The method of claim 4 wherein the step of combining the plurality of dither signals with the plurality of signals comprises the step of combining a plurality of digital dither signals with a plurality of digital signals.

6. The method of claim 4 wherein the step of combining the plurality of dither signals with the plurality of signals comprises the step of combining a plurality of analog dither signals with a plurality of analog signals.

7. The method of claim 4 wherein the step of converting the plurality of signals with dither to a second plurality of signals with dither comprises the step of converting a plurality of digital signals with dither to a plurality of analog signals with dither.

8. The method of claim 4 wherein the step of converting the plurality of signals with dither to a second plurality of signals with dither comprises the step of converting a plurality of analog signals with dither to a plurality of digital signals with dither.

9. The method of claim 4 wherein the step of combining the second plurality of signals with dither to form a combined signal comprises the step of adding the second plurality of signals via an addition operation.

10. The method of claim 4 wherein the step of combining the second plurality of signals with dither to form a combined signal comprises the step of adding the second plurality of signals via a multiplication operation.

11. An apparatus for adding and removing a dither signal from a plurality of signals, wherein a sum of the plurality of signals equals a first value, the apparatus comprising:

a plurality of signal sources generating a plurality of signals;

a dither generator outputting a plurality of dither signals;

first combining circuitry having the plurality of signals and the plurality of dither signals as an input and outputting a plurality of signals with dither, wherein a sum of the plurality of signals with dither is substantially equal to the first value;

a plurality of converters having the plurality of signals with dither as inputs and outputting a plurality of converted signals with dither; and

a second combining circuit having the plurality of converted signals with dither as an input and outputting a combined signal having the plurality of dither signals substantially eliminated.

12. The apparatus of claim 11 wherein the plurality of signal sources comprise a plurality of digital signal sources.

13. The apparatus of claim 12 wherein the plurality of converters comprise a plurality of digital to analog converters.

14. The apparatus of claim 11 wherein the plurality of signal sources comprise a plurality of analog signal sources.

15. The apparatus of claim 14 wherein the plurality of converters comprise a plurality of analog to digital converters.

16. The apparatus of claim 11 wherein the combining circuitry utilizes an additive operation when combining signals.