Semiconductor device having nitrogen enhanced high permittivity gate insulating layer and fabrication thereof

• US 5,963,810 A
• Filed: 12/18/1997
• Issued: 10/05/1999
• Est. Priority Date: 12/18/1997
• Status: Expired due to Term

• Current Assignee: Advanced Micro Devices SDN Berhad (Advanced Micro Devices, Inc.)
• Original Assignee: Advanced Micro Devices SDN Berhad (Advanced Micro Devices, Inc.)
• Inventors: Gardner, Mark I., Gilmer, Mark C., Spikes, Jr., Thomas E.
• Primary Examiner(s): Bowers, Charles
• Assistant Examiner(s): Thompson, Craig
• Application Number:
  US08/993,414
• Time in Patent Office: 656 Days
• Field of Search: 438/287-288, 438/591, 438/770, 438/305, 438/306, 438/513, 438/636, 438/769, 438/785
• US Class Current: 438/287
• CPC Class Codes: H01L 21/28194 by deposition, e.g. evaporation, ALD, CVD, sputtering, laser deposition H01L21/28202 takes precedence
• CPC Class Codes: H01L 21/28202 in a nitrogen-containing ambient, e.g. nitride deposition, growth, oxynitridation, NH3 nitridation, N2O oxidation, thermal nitridation, RTN, plasma nitridation, RPN
• CPC Class Codes: H01L 29/513 the variation being perpendicular to the channel plane
• CPC Class Codes: H01L 29/517 the insulating material comprising a metallic compound, e.g. metal oxide, metal silicate H01L29/518 takes precedence
• CPC Class Codes: H01L 29/518 the insulating material containing nitrogen, e.g. nitride, oxynitride, nitrogen-doped material
• CPC Class Codes: H01L 29/66575 where the source and drain or source and drain extensions are self-aligned to the sides of the gate H01L29/66606 takes precedence

Abstract

A semiconductor device having a nitrogen enhanced high permittivity gate insulating layer and a process for manufacturing such a device is provided. Consistent with one embodiment, a high permittivity gate insulating layer is formed over a substrate using a nitrogen bearing gas. The gate insulating layer has a dielectric constant of at least 20. At least one gate electrode is formed over the high permittivity gate insulating layer. An optional nitride capping layer can be formed between the high permittivity gate insulating layer and the gate electrode. The nitrogen bearing gas may include one or more nitrogen bearing species, such as NO, NF₃ or N2, for example. The use of nitrogen in the formation of a high permittivity gate insulating layer can, for example, reduce oxidation of the high permittivity layer and increase the ability to control the characteristics of the gate insulating layer.

Claims

1. A process of forming a semiconductor device, comprising:

forming a high permittivity gate insulating layer over a substrate using a nitrogen bearing gas, the gate insulating layer having a dielectric constant at least 20; and

forming at least one gate electrode over the high permittivity gate insulating layer.

2. The process of claim 1, wherein forming the high permittivity gate insulating layer further includes forming a nitrogen bearing layer between the high permittivity gate insulating layer and the substrate.

3. The process of claim 2, wherein the nitrogen bearing layer is a nitrogen bearing oxide.

4. The process of claim 1, further including forming a nitride layer between the high permittivity gate insulating layer and the gate electrode.

5. The process of claim 4, wherein the nitride layer and high permittivity gate insulating layer are formed in-situ.

6. The process of claim 5, wherein:

forming the high permittivity gate insulating layer includes depositing a high permittivity material in a reaction chamber using jet vapor deposition techniques; and

forming the nitride layer includes depositing a nitride in the same reaction chamber using jet vapor deposition techniques.

7. The process of claim 6, further including purging the reaction chamber between forming the high permittivity gate insulating layer and forming the nitride layer.

8. The process of claim 4, wherein the gate electrode is formed from a silicon.

9. The process of claim 1, wherein the gate electrode is formed from a metal.

10. The process of claim 1, wherein forming the high permittivity gate insulating layer includes metal-organic chemical deposition of a high permittivity material.

11. The process of claim 1, wherein the high permittivity layer has a thickness ranging from about 100 to 3000 angstroms.

12. The process of claim 1, wherein the high permittivity gate insulating layer is formed from PZN.

13. The process of claim 1, wherein the high permittivity gate insulating layer is formed from PST.

14. The process of claim 1, wherein the nitrogen bearing gas includes NO.

15. The process of claim 1, wherein the nitrogen bearing gas includes one or more of NO, NF₃, and N₂.

16. A process of fabricating a semiconductor device, comprising:

forming a layer of nitride over a substrate by sputter deposition in a reaction chamber;

forming a high permittivity gate insulating layer over the nitride layer by sputter deposition using the same reaction chamber, the gate insulating layer having a dielectric constant at least 20; and

forming at least one gate electrode over the high permittivity gate insulating layer.

17. The process of claim 16, further including purging the reaction chamber between forming the high permittivity gate insulating layer and forming the nitride layer.

18. The process of claim 16, further including forming a nitride capping layer over the high permittivity gate insulating layer prior to forming the gate electrode.

19. The process of claim 18, wherein the nitride capping layer is formed by sputter deposition.

20. The process of claim 18, wherein the first layer of nitride, high permittivity gate insulating layer and nitride capping layer are deposited in the same reaction chamber.