Method for sequential and consistent startup and/or reload of multiple processor nodes in a multiple node cluster

• US 5,964,838 A
• Filed: 09/30/1997
• Issued: 10/12/1999
• Est. Priority Date: 09/30/1997
• Status: Expired due to Fees

• Current Assignee: Hewlett-Packard Development Company, L.P. (HP Inc.)
• Original Assignee: Tandem Computers Incorporated (HP Inc.)
• Inventors: Cheung, Yu-Cheung, Carley, William J.
• Primary Examiner(s): Rinehart, Mark H.
• Assistant Examiner(s): Thompson, Marc D.
• Application Number:
  US08/940,348
• Time in Patent Office: 742 Days
• Field of Search: 709/224, 709/220, 709/221, 709/222, 709/223, 379/34, 379/100.05, 379/106.01, 379/133, 714/47, 369/53, 340/853.2, 340/825.06, 340/825.07, 340/825.08, 364/479.14, 187/391, 187/393, 702/188, 395/838, 377/28
• US Class Current: 709/224
• CPC Class Codes: G06F 9/5016 the resource being the memory
• CPC Class Codes: G06F 9/52 Program synchronisation; Mutual exclusion, e.g. by means of semaphores

Abstract

A computing system comprising a number of multiple processor unit nodes interconnectively connected by a communications system to form a cluster is initialized in a manner that creates separate, independent execution environments for each processor unit. Each multiple processor unit node is configured to operate as a symmetric multiprocessing system with a single, shared memory. During a Startup procedure, memory area segments are created for each processor unit, providing processes running on that processor unit with mutually exclusive access to the associated memory area segment. Startup determines an order of the nodes of the cluster system, and establishes a Coordinator process in the lowest numbered processor unit in the first node of the order. The Coordinator process, when created, directs the remainder of the Startup procedure, and constructs a succession list that identifies the next processor unit in the order to take over the Coordinator process should the first fail.

Claims

1. In a processing system including a plurality of processing nodes communicatively intercoupled, at least some of the plurality of processing nodes comprising a symmetrical processing system having two or more processor units and a shared memory element, a method for installing a computing facility on the processing system that includes the steps:

(a) determining an order of the plurality of processing nodes;

(b) starting an initialization process on a first processing unit of a first one of the plurality of processing nodes according to the order;

(c) the initialization process starting a first monitor (MON) process on the first processor unit and establishing an affinity of the MON process for the first processor unit;

(d) the first MON process creating

(i) a first memory segment within the shared memory element for the first processor unit and

(ii) a Coordinator process to run on the first processor unit;

(e) the initialization process launching a reload process that starts a second MON (mon2) process on each remaining processor unit of the first one of the plurality of nodes, if any;

(f) thereafter, creating in each of the other of the plurality of nodes according to the order a second initialization process and, for each processor unit of each of the other of the plurality of nodes, a MON, a second memory segment area within the shared memory element, and a MON2 process having affinity for such processor unit.

2. The method of claim 1, wherein the first initialization process terminates after the MON and MON2 processes are created.

3. The method of claim 2, wherein the second initialization process in each of the plurality of nodes terminates after the MON and MON2 processes are created for each processor unit of such node.

4. In a processing system including a plurality of processing nodes communicatively intercoupled at least some of the plurality of processing nodes comprising a symmetrical processing system having two or more processor units and a shared memory element, a method for installing a computing facility on the processing system that includes the steps:

determining an order of the plurality of processing nodes;

sequentially initializing each of the plurality of processing nodes according to the order by,

creating on a first processor unit of a first of the plurality of nodes a first monitor process and a Coordinator process, the first monitor process creating a memory segment in the shared memory for the first processor unit,

creating on each of any remaining processor units of the first node a second MON process and a second memory segment area in the shared memory for the first node; and

for each succeeding node of the order,

creating on each processor unit of such succeeding node a second MON process and a second memory segment area in the shared memory for the first node.

5. The method of claim 4, wherein the Coordinator process constructs a succession table identifying an order of the processor units of the system, the order being indicative of each succeeding node of the order, which processor unit is next in order to have created thereon a successor Coordinator process should the Coordinator process fail.