Column readout multiplexer for CMOS image sensors with multiple readout and fixed pattern noise cancellation

• US 5,965,871 A
• Filed: 11/05/1997
• Issued: 10/12/1999
• Est. Priority Date: 11/05/1997
• Status: Expired due to Fees

• Current Assignee: PixArt Imaging Incorporated
• Original Assignee: Pixart Technology, Inc.
• Inventors: Li, Wei, Zhang, Zhongxuan, Shih, Li-yen, Zhou, Zhimin
• Primary Examiner(s): ALLEN, STEPHONE B
• Application Number:
  US08/964,924
• Time in Patent Office: 706 Days
• Field of Search: 250/208.1, 257/292-294, 327/91, 327/94, 327/514, 377/60
• US Class Current: 250/208.1
• CPC Class Codes: G11C 19/285 Peripheral circuits, e.g. for writing into the first stage; for reading-out of the last stage
• CPC Class Codes: H04N 25/616 involving a correlated sampling function, e.g. correlated double sampling [CDS] or triple sampling
• CPC Class Codes: H04N 25/63 applied to dark current
• CPC Class Codes: H04N 25/67 applied to fixed-pattern noise, e.g. non-uniformity of response
• CPC Class Codes: H04N 3/1568 for disturbance correction or prevention within the image-sensor, e.g. biasing, blooming, smearing correction circuits H04N25/62

Abstract

An active pixel sensing structure includes an array of pixel unit cells each of which an adapted to alternate between a light sensing mode wherein the cell outputs an image signal and a reset mode wherein the cell outputs a reset signal. The image signal is proportional to light incident on the cell, and the reset signal is proportional to a predefined reference potential. An improved readout circuit according to the present invention includes a first sample and hold component for receiving and storing the image signal, and second sample and hold component for receiving and storing the reset signal. A signal amplifier is provided for each sample and hold component. A switching circuit is operable between a first mode and a second mode. In the second mode, the first and second sample and hold components are operatively decoupled from the corresponding signal amplifiers while input terminals of the signal amplifiers are connected to a source of predetermined reference potential. With the switching circuit in the second mode, fixed pattern noise (FPN) attributable to the amplifiers is determined. With the switching means in the first mode, a voltage, D2, is determined across outputs of the signal amplifiers. The voltage, D2, is proportional to a voltage equal to the difference between the image signal and the reset signal plus the FPN voltage. A processing means subtracts the voltage, D1, from the voltage, D2, to develop a signal proportional to the light detected by the cell.

Claims

1. In an active pixel sensing structure including an array of pixel unit cells adapted to alternate between a light sensing mode wherein said cells output image signals and a reset mode wherein said cells output reset signals, said image signals being proportional to light incident on corresponding cells and said reset signals being proportional to a predefined reference potential, said structure further including readout circuit means connected to signal lines for reading out signals from said cells, an improved readout circuit means comprising:

first sample and hold means for receiving and storing an image signal developed on said signal lines;

second sample and hold means for receiving and storing a reset signal developed on said signal lines;

first signal amplifying means having a first input terminal and a first output terminal;

second signal amplifying means having a second input terminal and a second output terminal; and

switching means operable between a first mode wherein said first sample and hold means is coupled to said first input terminal and said second sample and hold means is coupled to said second input terminal, and a second mode wherein said first sample and hold means is operatively decoupled from said first input terminal, said second sample and hold means is operatively decoupled from said second input terminal, and said first and second input terminals are connected to a source of predetermined potential;

whereby with said switching means in said second mode, a voltage, D1, taken across said first and second output terminals is proportional to the fixed pattern noise voltage attributable to said first and second amplifying means; and

whereby with said switching means in said first mode, a voltage, D2, taken across said first and second output terminals is proportional to a voltage equal to the difference between said image signal and said reset signal plus said voltage, D1, such that by subtracting said voltage, D1, from said voltage, D2, a signal proportional to the actual light detected by a particular cell can be obtained.

2. In an active pixel sensing structure as recited in claim 1 wherein:

said first sample and hold means includes,

a first sampling switch having a first terminal coupled to receive said image signal, and a second terminal, and

a first capacitor having a third terminal coupled to said second terminal, and a fourth terminal coupled to a circuit ground; and

wherein said second sample and hold means includes,

a second sampling switch having a fifth terminal coupled to receive said reset signal, and a sixth terminal, and

a second capacitor having a seventh terminal coupled to said sixth terminal and an eighth terminal coupled to said circuit ground.

3. In an active pixel sensing structure as recited in claim 2 wherein said first and second capacitors are implemented using the gate and body of an MOS transistor as spaced apart capacitor plates.

4. In an active pixel sensing structure as recited in claim 2 wherein said first and second capacitors are implemented by spaced apart conductive plates.

5. In an active pixel sensing structure as recited in claim 2 wherein said switching means includes:

a first isolating switch having a ninth terminal coupled to receive said signal from said first sample and hold means, and a tenth terminal coupled to said first input terminal;

a first crowbar switch having an eleventh terminal coupled to said first input terminal, and a twelfth terminal coupled to receive said predefined potential;

a second isolating switch having a thirteenth terminal coupled to receive an image signal from said second sample and hold means, and a fourteenth terminal coupled to said second input terminal; and

a second crowbar switch having a fifteenth terminal coupled to said second input terminal, and a sixteenth terminal coupled to receive said predefined potential;

wherein while said switching means is in said first mode, said first and second isolating switches are closed to couple said first and second sample and hold means to said first and second input terminals and said first and second crowbar switches are open so that said voltage, D2, can be measured across said first and second output terminals; and

wherein while said switching means is in said second mode, said first and second crowbar switches are closed to couple said first and second input terminals to receive said predefined voltage source, and said first and second isolating switches are open to decouple said first and second sample and hold means from said first and second input terminals thereby conserving charge stored in said first and second sample and hold means.

6. In an active pixel sensing structure as recited in claim 5 wherein said first and second isolating switches and said first and second crowbar switches are implemented by NMOS transistors and wherein said first and second amplifier amplifying means are implemented by PMOS source follower transistors.

7. In an active pixel sensing structure as recited in claim 1 and further comprising:

a first selector switch for selectively connecting said first output terminal to a first input of a signal processing circuit; and

a second selector switch for selectively connecting said second output terminal to a second input of said signal processing circuit, said first and second switching means being simultaneously controlled by an output select signal.

8. In an active pixel sensing structure as recited in claim 1 wherein:

said first sample and hold means includes,

a first sampling switch having a first terminal coupled to receive said image signal, and a second terminal, and

a first capacitor having a third terminal coupled to said second terminal and a fourth terminal coupled to said first input terminal; and

said second sample and hold means comprises,

a second sampling switch having a fifth terminal coupled to receive said reset signal, and a sixth terminal, and

a second capacitor having a seventh terminal coupled to said sixth terminal and an eighth terminal coupled to said second input terminal.

9. In an active pixel sensing structure as recited in claim 8 wherein said first and second capacitors are implemented using the gate and body of an MOS transistor as spaced apart capacitor plates.

10. In an active pixel sensing structure as recited in claim 8 wherein each of said first and second capacitors is implemented by spaced apart conductive plates.

11. In an active pixel sensing structure as recited in claim 1 wherein said switching means includes:

a first isolating switch having a first terminal coupled to said first sample and hold means, and a second terminal coupled to said first input terminal;

a second isolating switch having a third terminal coupled to said second sample and hold means, and a fourth terminal coupled to said second input terminal;

a first crowbar switch having a fifth terminal coupled to said second terminal and to said first input terminal, and a sixth terminal coupled to a source of predetermined potential; and

a second crowbar switch having a seventh terminal coupled to said second sample and hold means and to said second input terminal, and an eighth terminal coupled to said source of predetermined potential;

wherein while said switching means is in said first mode, said first and second crowbar switches are open and said first and second isolating switches are closed in order to determine said voltage, D2, across said first and second output terminals; and

wherein while said switching means is in said second mode, said first and second isolating switches are open and said first and second crowbar switches are closed to clamp said first and second input terminals to said source of predetermined voltage in order to determine said voltage, D1, across said first and second output terminals.

12. In an active pixel sensing structure as recited in claim 11 wherein said first and second isolating switches are implemented by NMOS transistors, said first and second crowbar switches are implemented by PMOS transistors, and said first and second amplifying means are implemented by NMOS source follower transistors.

13. In an active pixel sensing structure as recited in claim 1 wherein each of said first and second signal amplifying means includes a source follower MOS transistor.

14. In an active pixel sensing structure as recited in claim 8 further comprising:

a first column select switch for selectively coupling said first output terminal to an output signal processing means; and

a second column select switch for selectively coupling said second output terminal to said output signal processing means and wherein said output signal processing means performs said function of subtracting said voltage, D1, from said voltage, D2.

15. In an active pixel sensing structure as recited in claim 14 wherein said column select switches are implemented by MOS transistors.

16. In an active pixel sensing structure as recited in claim 1 wherein at least some of said pixel unit cells include a p-n junction photodiode.

17. In an active pixel sensing structure as recited in claim 1 wherein at least some of said pixel unit cells comprise:

a photosensing structure having a sensing node;

a reset switch for periodically resetting said sensing node to a reference voltage; and

an in-pixel source follower for amplifying a signal transmitted from said sensing node.

18. A method of reading out signals from the cells of an active pixel sensing structure including an array of pixel unit cells adapted to alternate between a light sensing mode wherein each said cell outputs an image signal, and a reset mode wherein each said cell outputs a reset signal, the image signals being proportional to light incident on corresponding cells and the reset signals being proportional to a predetermined reference potential, said method comprising the steps of

sampling and holding an image signal generated by a particular cell;

sampling and holding a reset signal generated by said particular cell;

providing a first signal amplifying means having a first input terminal and a first output terminal;

providing a second signal amplifying means having a second input terminal and a second output terminal;

providing a switching means operable between a first mode wherein said image signal is coupled to said first input terminal and said reset signal is coupled to said second input terminal, and a second mode wherein said image signal is operatively decoupled from said first input terminal and said reset signal is operatively decoupled from said second input terminal, and said first and second input terminals are coupled to a predefined potential;

determining a voltage, D1, across said first and second output terminals with said switching means in said second mode, said voltage, D1, being proportional to a fixed pattern noise voltage attributable to said first and second amplifying means;

determining a voltage, D2, across said first and second output terminals with said switching means in said first mode wherein said voltage, D2, is proportional to a voltage equal to the difference between said image signal and said reset signal plus said fixed pattern noise voltage; and

subtracting said voltage, D1, from said voltage, D2, to determine a signal proportional to the light detected by said particular cell.