Switching circuit at high frequency with low insertion loss
First Claim
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1. A switching circuit comprising:
- a field-effect transistor having a signal path between a drain terminal and a source terminal,a first impedance element connected to a gate terminal of said field-effect transistor, andfirst and second input/output terminals connected to said drain terminal and said source terminal of said field-effect transistor respectively,a second impedance element which is connected between said drain terminal and a bias voltage source,a third impedance element which is connected between said source terminal and said bias voltage source, andan inductor connected directly to said drain and source terminals of said field effect transistor;
wherein said switching circuit further comprises another field-effect transistor connected in series between said first input/output terminal and a third input/output terminal.
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Abstract
In a switching circuit, low insertion loss and enough isolation can be ensured at a desired frequency at the same time. An inductor is externally connected in parallel with the path between the drain and source of each of field-effect transistors built in a switching integrated circuit, and the inductor and the OFF capacitance of the field-effect transistor are made to generate parallel resonance. At this time, by suitably adjusting the inductance, low insertion loss and enough isolation are ensured at a desired frequency at the same time.
116 Citations
18 Claims
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1. A switching circuit comprising:
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a field-effect transistor having a signal path between a drain terminal and a source terminal, a first impedance element connected to a gate terminal of said field-effect transistor, and first and second input/output terminals connected to said drain terminal and said source terminal of said field-effect transistor respectively, a second impedance element which is connected between said drain terminal and a bias voltage source, a third impedance element which is connected between said source terminal and said bias voltage source, and an inductor connected directly to said drain and source terminals of said field effect transistor; wherein said switching circuit further comprises another field-effect transistor connected in series between said first input/output terminal and a third input/output terminal. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8)
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9. A switching circuit comprising:
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first, second, third and fourth input/output terminals, a first field-effect transistor having drain and source terminals connected to said first and second input/output terminals respectively, a second field-effect transistor having drain and source terminals connected to said second and third input/output terminals respectively, a third field-effect transistor having drain and source terminals connected to said third and fourth input/output terminals respectively, a fourth field-effect transistor having drain and source terminals connected to said fourth and first input/output terminals respectively, and first, second, third and fourth impedance elements connected to gate terminals of said first, second, third and fourth field-effect transistors respectively; and first, second, third and fourth inductors connecting said first and second input/output terminals to each other, said second and third input/output terminals to each other, said third and fourth input/output terminals to each other, and said fourth and first input/output terminals to each other respectively. - View Dependent Claims (10, 11, 12, 13, 14, 15)
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16. A switching circuit comprising:
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a field-effect transistor having a signal path between a drain terminal and a source terminal, a first impedance element connected to a gate terminal of said field-effect transistor, and first and second input/output terminals connected to said drain terminal and said source terminal of said field effect transistor respectively, a second impedance element which is connected between said drain terminal and a bias voltage source, a third impedance element which is connected between said source terminal and said bias voltage source, an inductor connected between said first and second input/output terminals, a second field-effect transistor connected between said first input/output terminal and a third input/output terminal. - View Dependent Claims (17, 18)
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Specification