Microelectromechanical structure and process of making same

• US 5,970,315 A
• Filed: 10/03/1997
• Issued: 10/19/1999
• Est. Priority Date: 07/21/1995
• Status: Expired due to Term

• Current Assignee: Carnegie Mellon University
• Original Assignee: Carnegie Mellon University
• Inventors: Fedder, Gary K., Reed, Michael L., Santhanam, Suresh, Carley, L. Richard
• Primary Examiner(s): Mulpuri, Savitri
• Application Number:
  US08/943,663
• Time in Patent Office: 746 Days
• Field of Search: 250/306, 250/307, 365/174, 257/10, 216/2, 216/11, 438/701, 438/52, 438/706, 438/719, 438/723, 438/738, 438/739, 438/745, 438/753, 438/756, 438/710, 438/700, 438/924, 438/970
• US Class Current: 438/52
• CPC Class Codes: B81B 2201/07 Data storage devices, static or dynamic memories
• CPC Class Codes: B81B 2201/12 STM or AFM microtips
• CPC Class Codes: B81B 2203/0361 Tips, pillars
• CPC Class Codes: B81C 1/0015 Cantilevers switches using MEMS H01H1/0036; electrostatic relays using micromechanics H01H59/0009; microelectro-mechanical resonators H03H9/02244
• CPC Class Codes: B81C 2201/0109 Sacrificial layers not provided for in B81C2201/0107 - B81C2201/0108
• CPC Class Codes: B81C 2201/0132 Dry etching, i.e. plasma etching, barrel etching, reactive ion etching [RIE], sputter etching or ion milling
• CPC Class Codes: B82Y 10/00 Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
• CPC Class Codes: G11B 2005/0002 Special dispositions or recording techniques
• CPC Class Codes: G11B 9/14 using microscopic probe means , i.e. recording or reproducing by means directly associated with the tip of a microscopic electrical probe as used in Scanning Tunneling Microscopy [STM] or Atomic Force Microscopy [AFM] for inducing physical or electrical perturbations in a recording medium; Record carriers or media specially adapted for such transducing of information marking using electrical current B41M5/20; measuring roughness or irregularity of surfaces G01B7/34; details of scanning-probe microscopes G01Q
• CPC Class Codes: G11B 9/1409 Heads
• CPC Class Codes: G11B 9/1418 Disposition or mounting of heads or record carriers G11B17/00 and G11B19/00 take precedence
• CPC Class Codes: G11B 9/1445 switching at least one head in operating function; Controlling the relative spacing to keep the head operative, e.g. for allowing a tunnel current flow
• CPC Class Codes: H02N 1/006 of the gap-closing type H02N1/004 takes precedence
• CPC Class Codes: Y10S 977/861 Scanning tunneling probe
• CPC Class Codes: Y10S 977/881 Microscopy or spectroscopy, e.g. sem, tem
• CPC Class Codes: Y10S 977/888 Shaping or removal of materials, e.g. etching
• CPC Class Codes: Y10S 977/89 Deposition of materials, e.g. coating, cvd, or ald

Abstract

The present invention is directed to a process for fabricating a microelectromechanical device from a substrate carrying at least one layer of a non-erodible material laid out to form at least a portion of the microelectromechanical device, at least one layer of an erodible material, and at least one sacrificial layer. The process includes the step of using the layer of non-erodible material as a mask and anistropically etching any of the layer of erodible material not occluded by the layer of non-erodible material. The process also includes the step of isotropically etching the sacrificial layer under at least a beam portion of the microelectromechanical device to free the beam portion of the microelectromechanical device from the substrate.

Claims

1. A process for fabricating a microelectromechanical device from a substrate carrying at least one layer of a non-erodible material laid out to form at least a portion of said microelectromechanical device, at least one layer of an erodible material, and at least one sacrificial layer, comprising the steps of:

using the layer of non-erodible material as a mask and anistropically etching any of said layer of erodible material not occluded by said layer of non-erodible material; and

isotropically etching said sacrificial layer under at least a beam portion of said microelectromechanical device to free said beam portion of said microelectromechanical device from said substrate.

2. The process of claim 1 wherein said non-erodible material is a metal conductor, said erodible material is an insulator, and said sacrificial layer is a doped silicon conductor.

3. The process of claim 2 wherein said metal conductor is aluminum, said insulator is an oxide, and said doped silicon conductor is polysilicon, and wherein said step of anistropic etching includes the step of ion etching in an oxygen-rich atmosphere.

4. The process of claim 3 wherein said step of isotropically etching includes the step of isotropically etching with HNO₃ :

HF.

5. The process of claim 3 wherein said step of isotropically etching includes the step of isotropically etching with a gas phase in a plasma.

6. A process for fabricating a microelectromechanical device from a substrate carrying at least one layer of a non-erodible conductive aluminum mask material laid out to form at least a portion of said microelectromechanical device, at least one layer of an erodible insulative oxide material, and at least one polysilicon sacrificial layer, comprising the steps of:

anistropically etching any of said layer of erodible material not occluded by said layer of non-erodible material using an ion etch in an oxygen-rich atmosphere; and

isotropically etching said sacrificial layer under at least a beam portion of said microelectromechanical device to free said beam portion of said microelectromechanical device from said substrate.

7. The process of claim 6 wherein said step of isotropically etching includes the step of isotropically etching with HNO₃ :

HF.

8. The process of claim 6 wherein said step of isotropically etching includes the step of isotropically etching with a gas phase in a plasma.